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hdmirx: optimize esm clock init sequence [1/1]
PD#SWPL-13779 Problem: esm can not work after burning a new key and regenerating new fw.le as the esm clock was not configured when probe. Solution: so we need to configure ESM clock no matter hdcp2.2 is burned or not. Verify: None Change-Id: I793b63ad2f20434b9f8f27ccca7c80dee2990718 Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
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@@ -2309,25 +2309,24 @@ static int hdmirx_probe(struct platform_device *pdev)
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}
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hdcp22_on = rx_is_hdcp22_support();
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if (hdcp22_on) {
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hdevp->esm_clk = clk_get(&pdev->dev, "hdcp_rx22_esm");
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if (IS_ERR(hdevp->esm_clk)) {
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rx_pr("get esm_clk err\n");
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} else {
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clk_set_parent(hdevp->esm_clk, fclk_div7_clk);
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clk_set_rate(hdevp->esm_clk, 285714285);
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clk_prepare_enable(hdevp->esm_clk);
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clk_rate = clk_get_rate(hdevp->esm_clk);
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}
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hdevp->skp_clk = clk_get(&pdev->dev, "hdcp_rx22_skp");
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if (IS_ERR(hdevp->skp_clk)) {
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rx_pr("get skp_clk err\n");
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} else {
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clk_set_parent(hdevp->skp_clk, xtal_clk);
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clk_set_rate(hdevp->skp_clk, 24000000);
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clk_prepare_enable(hdevp->skp_clk);
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clk_rate = clk_get_rate(hdevp->skp_clk);
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}
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hdevp->esm_clk = clk_get(&pdev->dev, "hdcp_rx22_esm");
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if (IS_ERR(hdevp->esm_clk)) {
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rx_pr("get esm_clk err\n");
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} else {
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clk_set_parent(hdevp->esm_clk, fclk_div7_clk);
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clk_set_rate(hdevp->esm_clk, 285714285);
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clk_prepare_enable(hdevp->esm_clk);
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clk_rate = clk_get_rate(hdevp->esm_clk);
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}
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hdevp->skp_clk = clk_get(&pdev->dev, "hdcp_rx22_skp");
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if (IS_ERR(hdevp->skp_clk)) {
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rx_pr("get skp_clk err\n");
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} else {
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clk_set_parent(hdevp->skp_clk, xtal_clk);
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clk_set_rate(hdevp->skp_clk, 24000000);
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clk_prepare_enable(hdevp->skp_clk);
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clk_rate = clk_get_rate(hdevp->skp_clk);
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}
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if ((rx.chip_id == CHIP_ID_TXLX) ||
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(rx.chip_id == CHIP_ID_TXHD)) {
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@@ -41,7 +41,7 @@
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*
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*
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*/
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#define RX_VER1 "ver.2019/07/19"
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#define RX_VER1 "ver.2019/09/05"
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/*
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*
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*
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