From 69e93ab7f65aa5873be159ec053dd1dcd29bb747 Mon Sep 17 00:00:00 2001 From: Yue Wang Date: Wed, 12 Sep 2018 13:31:27 +0800 Subject: [PATCH] usb: optimize g12a & g12b usb phy reset timing. PD#173329: usb: optimize g12a & g12b usb phy reset timing. Change-Id: Ib1ffe45d418a6ec023d19e888c54d60cac226473 Signed-off-by: Yue Wang --- drivers/amlogic/usb/phy/phy-aml-new-usb-v2.c | 21 ++++++++++++++++--- drivers/amlogic/usb/phy/phy-aml-new-usb2-v2.c | 21 +++++++++++-------- 2 files changed, 30 insertions(+), 12 deletions(-) diff --git a/drivers/amlogic/usb/phy/phy-aml-new-usb-v2.c b/drivers/amlogic/usb/phy/phy-aml-new-usb-v2.c index b93c311c0aaa..e862717202c3 100644 --- a/drivers/amlogic/usb/phy/phy-aml-new-usb-v2.c +++ b/drivers/amlogic/usb/phy/phy-aml-new-usb-v2.c @@ -49,9 +49,24 @@ EXPORT_SYMBOL_GPL(amlogic_new_usbphy_reset_v2); int amlogic_new_usbphy_reset_phycfg_v2(struct amlogic_usb_v2 *phy, int cnt) { - if (phy->reset_regs) - writel((readl(phy->reset_regs) | (1 << (16 + cnt))), - phy->reset_regs); + u32 val; + u32 temp = 0; + + while (cnt--) + temp = temp | (1 << (16 + cnt)); + + /* set usb phy to low power mode */ + val = readl((void __iomem *) + ((unsigned long)phy->reset_regs + (0x21 * 4 - 0x8))); + writel((val & (~temp)), (void __iomem *) + ((unsigned long)phy->reset_regs + (0x21 * 4 - 0x8))); + + udelay(100); + + val = readl((void __iomem *) + ((unsigned long)phy->reset_regs + (0x21 * 4 - 0x8))); + writel((val | temp), (void __iomem *) + ((unsigned long)phy->reset_regs + (0x21 * 4 - 0x8))); return 0; } diff --git a/drivers/amlogic/usb/phy/phy-aml-new-usb2-v2.c b/drivers/amlogic/usb/phy/phy-aml-new-usb2-v2.c index a77d5e26a10f..6cc8d0140a0f 100644 --- a/drivers/amlogic/usb/phy/phy-aml-new-usb2-v2.c +++ b/drivers/amlogic/usb/phy/phy-aml-new-usb2-v2.c @@ -134,20 +134,23 @@ static int amlogic_new_usb2_init(struct usb_phy *x) } writel(reg0.d32, u2p_aml_regs.u2p_r_v2[0]); + } - udelay(10); - amlogic_new_usbphy_reset_phycfg_v2(phy, i); - udelay(50); -#if 0 + udelay(10); + amlogic_new_usbphy_reset_phycfg_v2(phy, phy->portnum); + udelay(50); + + for (i = 0; i < phy->portnum; i++) { + for (j = 0; j < 2; j++) { + u2p_aml_regs.u2p_r_v2[j] = (void __iomem *) + ((unsigned long)phy->regs + i*PHY_REGISTER_SIZE + + 4 * j); + } /* ID DETECT: usb2_otg_aca_en set to 0 */ /* usb2_otg_iddet_en set to 1 */ writel(readl(phy->phy_cfg[i] + 0x54) & (~(1 << 2)), (phy->phy_cfg[i] + 0x54)); - if (i == 1) { - writel((readl(phy->phy_cfg[i] + 0x50) | (1 << 0)), - (phy->phy_cfg[i] + 0x50)); - } -#endif + reg1.d32 = readl(u2p_aml_regs.u2p_r_v2[1]); cnt = 0; while (reg1.b.phy_rdy != 1) {