From 69f7e33f6b53b3522e3fb40c29b99d273531c080 Mon Sep 17 00:00:00 2001
From: Sandy Huang <hjc@rock-chips.com>
Date: Wed, 22 Apr 2020 12:01:41 +0800
Subject: [PATCH] ARM: dts: rv1126: update RGB output io default driver
 strength

Change-Id: Ibbd3fd9198affb8c3e895f275e90ec41cccbe526
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 arch/arm/boot/dts/rv1126-pinctrl.dtsi | 91 ++++++++++++++-------------
 1 file changed, 48 insertions(+), 43 deletions(-)

diff --git a/arch/arm/boot/dts/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rv1126-pinctrl.dtsi
index f8eeaf7d0b1f..39182941fb47 100644
--- a/arch/arm/boot/dts/rv1126-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rv1126-pinctrl.dtsi
@@ -642,68 +642,73 @@
 				<2 RK_PA7 2 &pcfg_pull_none>;
 		};
 	};
+
 	lcdc {
 		/omit-if-no-ref/
 		lcdc_ctl: lcdc-ctl {
 			rockchip,pins =
-				/* lcdc_clk */
-				<2 RK_PD7 1 &pcfg_pull_none>,
 				/* lcdc_d0 */
-				<2 RK_PA4 1 &pcfg_pull_none>,
+				<2 RK_PA4 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_d1 */
-				<2 RK_PA5 1 &pcfg_pull_none>,
-				/* lcdc_d10 */
-				<2 RK_PB6 1 &pcfg_pull_none>,
-				/* lcdc_d11 */
-				<2 RK_PB7 1 &pcfg_pull_none>,
-				/* lcdc_d12 */
-				<2 RK_PC0 1 &pcfg_pull_none>,
-				/* lcdc_d13 */
-				<2 RK_PC1 1 &pcfg_pull_none>,
-				/* lcdc_d14 */
-				<2 RK_PC2 1 &pcfg_pull_none>,
-				/* lcdc_d15 */
-				<2 RK_PC3 1 &pcfg_pull_none>,
-				/* lcdc_d16 */
-				<2 RK_PC4 1 &pcfg_pull_none>,
-				/* lcdc_d17 */
-				<2 RK_PC5 1 &pcfg_pull_none>,
-				/* lcdc_d18 */
-				<2 RK_PC6 1 &pcfg_pull_none>,
-				/* lcdc_d19 */
-				<2 RK_PC7 1 &pcfg_pull_none>,
+				<2 RK_PA5 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_d2 */
-				<2 RK_PA6 1 &pcfg_pull_none>,
-				/* lcdc_d20 */
-				<2 RK_PD0 1 &pcfg_pull_none>,
-				/* lcdc_d21 */
-				<2 RK_PD1 1 &pcfg_pull_none>,
-				/* lcdc_d22 */
-				<2 RK_PD2 1 &pcfg_pull_none>,
-				/* lcdc_d23 */
-				<2 RK_PD3 1 &pcfg_pull_none>,
+				<2 RK_PA6 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_d3 */
-				<2 RK_PA7 1 &pcfg_pull_none>,
+				<2 RK_PA7 1 &pcfg_pull_none_drv_level_2>,
+
 				/* lcdc_d4 */
-				<2 RK_PB0 1 &pcfg_pull_none>,
+				<2 RK_PB0 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_d5 */
-				<2 RK_PB1 1 &pcfg_pull_none>,
+				<2 RK_PB1 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_d6 */
-				<2 RK_PB2 1 &pcfg_pull_none>,
+				<2 RK_PB2 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_d7 */
-				<2 RK_PB3 1 &pcfg_pull_none>,
+				<2 RK_PB3 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_d8 */
-				<2 RK_PB4 1 &pcfg_pull_none>,
+				<2 RK_PB4 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_d9 */
-				<2 RK_PB5 1 &pcfg_pull_none>,
+				<2 RK_PB5 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d10 */
+				<2 RK_PB6 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d11 */
+				<2 RK_PB7 1 &pcfg_pull_none_drv_level_2>,
+
+				/* lcdc_d12 */
+				<2 RK_PC0 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d13 */
+				<2 RK_PC1 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d14 */
+				<2 RK_PC2 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d15 */
+				<2 RK_PC3 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d16 */
+				<2 RK_PC4 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d17 */
+				<2 RK_PC5 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d18 */
+				<2 RK_PC6 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d19 */
+				<2 RK_PC7 1 &pcfg_pull_none_drv_level_2>,
+
+				/* lcdc_d20 */
+				<2 RK_PD0 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d21 */
+				<2 RK_PD1 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d22 */
+				<2 RK_PD2 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_d23 */
+				<2 RK_PD3 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_den */
-				<2 RK_PD4 1 &pcfg_pull_none>,
+				<2 RK_PD4 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_hsync */
-				<2 RK_PD5 1 &pcfg_pull_none>,
+				<2 RK_PD5 1 &pcfg_pull_none_drv_level_2>,
 				/* lcdc_vsync */
-				<2 RK_PD6 1 &pcfg_pull_none>;
+				<2 RK_PD6 1 &pcfg_pull_none_drv_level_2>,
+				/* lcdc_clk */
+				<2 RK_PD7 1 &pcfg_pull_none_drv_level_8>;
 		};
 	};
+
 	mcu {
 		/omit-if-no-ref/
 		mcu_pins: mcu-pins {