diff --git a/drivers/amlogic/media/enhancement/amvecm/bitdepth.c b/drivers/amlogic/media/enhancement/amvecm/bitdepth.c index 50a1e6dfff42..a9395a3da09a 100644 --- a/drivers/amlogic/media/enhancement/amvecm/bitdepth.c +++ b/drivers/amlogic/media/enhancement/amvecm/bitdepth.c @@ -309,6 +309,17 @@ void vpp_set_vd2_mux5(bool flag) WRITE_VPP_REG_BITS(VD2_AFBCD1_MISC_CTRL, flag, 14, 2); } +/*0:vd1 gclk enable 0x55: disbale */ +void vpp_set_vd1_gate(unsigned int flag) +{ + WRITE_VPP_REG_BITS(VD1_AFBCD0_MISC_CTRL, flag, 0, 8); +} +/*0:vd2 gclk enable 0x55: disbale */ +void vpp_set_vd2_gate(unsigned int flag) +{ + WRITE_VPP_REG_BITS(VD2_AFBCD1_MISC_CTRL, flag, 0, 8); +} + /*blend src mux==>0:close;1:vd1;2:vd2:3:osd1;4:osd2*/ void vpp_set_vd1_preblend_mux(unsigned int flag) { @@ -383,11 +394,13 @@ void vpp_set_12bit_datapath_g12a(void) vpp_set_vd1_preblend_mux(0); vpp_set_vd1_postblend_mux(0); vpp_set_vd1_postblend_en(1); + vpp_set_vd1_gate(0x55); vpp_set_vd2_preblend_mux(0); vpp_set_vd2_postblend_mux(0); vpp_set_vd2_postblend_en(0); vpp_set_vd2_ext_mod(0); vpp_set_vd2_bypass_dolby(1); + vpp_set_vd2_gate(0x55); } } diff --git a/drivers/amlogic/media/osd/osd_hw.c b/drivers/amlogic/media/osd/osd_hw.c index fb02afb81222..8668ec1329b7 100644 --- a/drivers/amlogic/media/osd/osd_hw.c +++ b/drivers/amlogic/media/osd/osd_hw.c @@ -1092,7 +1092,7 @@ void osd_hw_reset(void) VSYNCOSD_IRQ_WR_MPEG_REG( VIU_SW_RESET, 0); if (reset_bit == HW_RESET_MALI_AFBCD_REGS) - osd_log_dbg("reset_bit=%x\n", reset_bit); + osd_log_dbg("reset_bit=%x\n", reset_bit); if (reset_bit & HW_RESET_OSD1_REGS) { /* restore osd regs */ int i; @@ -3912,8 +3912,10 @@ static void osd_update_enable(u32 index) u32 temp_val = 0; struct hw_osd_reg_s *osd_reg = &hw_osd_reg_array[index]; + /* if (!osd_hw.buffer_alloc[index]) return; + */ if ((osd_hw.osd_meson_dev.afbc_type == MESON_AFBC) && (osd_hw.enable[index] == ENABLE)) { /* only for osd1 */ @@ -4652,19 +4654,6 @@ static int vpp_blend_setting(struct hw_osd_blending_s *blending) VSYNCOSD_WR_MPEG_REG(VPP_OSD2_BLD_V_SCOPE, osd2_v_start << 16 | osd2_v_end); - osd_log_dbg("vinfo_height=%d,vinfo_width=%d\n", - osd_hw.vinfo_height, osd_hw.vinfo_width); - VSYNCOSD_WR_MPEG_REG(VPP_POSTBLEND_H_SIZE, - osd_hw.vinfo_height << 16 | - osd_hw.vinfo_width); - VSYNCOSD_WR_MPEG_REG(VPP_OUT_H_V_SIZE, - osd_hw.vinfo_height << 16 | - osd_hw.vinfo_width); - - VSYNCOSD_WR_MPEG_REG(VPP_POST_BLEND_BLEND_DUMMY_DATA, - 0x00000000);//yuv 0x000080880 - VSYNCOSD_WR_MPEG_REG(VPP_POST_BLEND_DUMMY_ALPHA, - 0x00000000);//dummy alpha yuv 0x10000000 return 0; } @@ -4718,19 +4707,6 @@ static int vpp_blend_setting_default(u32 index) VSYNCOSD_WR_MPEG_REG(VPP_OSD1_BLD_V_SCOPE, osd1_v_start << 16 | osd1_v_end); - osd_log_dbg("vinfo_height=%d,vinfo_width=%d\n", - osd_hw.vinfo_height, osd_hw.vinfo_width); - VSYNCOSD_WR_MPEG_REG(VPP_POSTBLEND_H_SIZE, - osd_hw.vinfo_height << 16 | - osd_hw.vinfo_width); - VSYNCOSD_WR_MPEG_REG(VPP_OUT_H_V_SIZE, - osd_hw.vinfo_height << 16 | - osd_hw.vinfo_width); - - VSYNCOSD_WR_MPEG_REG(VPP_POST_BLEND_BLEND_DUMMY_DATA, - 0x00000000);//yuv 0x000080880 - VSYNCOSD_WR_MPEG_REG(VPP_POST_BLEND_DUMMY_ALPHA, - 0x00000000);//dummy alpha yuv 0x10000000 return 0; } @@ -5633,8 +5609,14 @@ static void osd_update_fifo(u32 index) data32 = osd_hw.urgent[index] & 1; data32 |= 4 << 5; /* hold_fifo_lines */ - /* burst_len_sel: 3=64 */ - data32 |= 3 << 10; + + /* burst_len_sel: 3=64, g12a = 5 */ + if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE) { + data32 |= 1 << 10; + data32 |= 1 << 31; + } else + data32 |= 3 << 10; + /* fifo_depth_val: 32*8=256 */ data32 |= (osd_hw.osd_meson_dev.osd_fifo_len & 0xfffffff) << 12; @@ -5756,8 +5738,12 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe, */ data32 = 1; data32 |= 4 << 5; /* hold_fifo_lines */ - /* burst_len_sel: 3=64 */ - data32 |= 3 << 10; + /* burst_len_sel: 3=64, g12a = 5 */ + if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE) { + data32 |= 1 << 10; + data32 |= 1 << 31; + } else + data32 |= 3 << 10; /* * bit 23:22, fifo_ctrl * 00 : for 1 word in 1 burst @@ -5828,6 +5814,15 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe, osd_hw.osd_afbcd[idx].afbc_start = 0; osd_hw.afbc_start_in_vsync = 0; osd_hw.afbc_force_reset = 1; + /* TODO: temp set at here, need move it to uboot */ + osd_reg_set_bits( + hw_osd_reg_array[idx].osd_fifo_ctrl_stat, + 1, 31, 1); + /* TODO: temp set at here, need check for logo */ + if (idx > 0) + osd_reg_set_bits( + hw_osd_reg_array[idx].osd_ctrl_stat, + 0, 0, 1); #if 0 /* enable for latch */ osd_hw.osd_use_latch = 1; @@ -5839,8 +5834,24 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe, hw_osd_reg_array[idx].osd_ctrl_stat, data32); #endif } + /* TODO: temp power down */ + switch_vpu_mem_pd_vmod( + VPU_VIU_OSD2, + VPU_MEM_POWER_DOWN); + switch_vpu_mem_pd_vmod( + VPU_VD2_OSD2_SCALE, + VPU_MEM_POWER_DOWN); + switch_vpu_mem_pd_vmod( + VPU_VIU_OSD3, + VPU_MEM_POWER_DOWN); + switch_vpu_mem_pd_vmod( + VPU_OSD_BLD34, + VPU_MEM_POWER_DOWN); osd_setting_default_hwc(); } + /* disable deband as default */ + if (osd_hw.osd_meson_dev.has_deband) + osd_reg_write(OSD_DB_FLT_CTRL, 0); for (idx = 0; idx < osd_hw.osd_meson_dev.osd_count; idx++) { osd_hw.updated[idx] = 0; osd_hw.urgent[idx] = 1; diff --git a/drivers/amlogic/media/video_sink/video.c b/drivers/amlogic/media/video_sink/video.c index 3cdf9d9fd377..33349cf0dcfa 100644 --- a/drivers/amlogic/media/video_sink/video.c +++ b/drivers/amlogic/media/video_sink/video.c @@ -8808,10 +8808,14 @@ static void do_vpu_delay_work(struct work_struct *work) switch_vpu_mem_pd_vmod( VPU_DI_POST, VPU_MEM_POWER_DOWN); - if (!legacy_vpp) + if (!legacy_vpp) { switch_vpu_mem_pd_vmod( VPU_VD1_SCALE, VPU_MEM_POWER_DOWN); + WRITE_VCBUS_REG_BITS( + VD1_AFBCD0_MISC_CTRL, + 0x55, 0, 8); + } } if ((vpu_delay_work_flag & @@ -8826,10 +8830,14 @@ static void do_vpu_delay_work(struct work_struct *work) switch_vpu_mem_pd_vmod( VPU_AFBC_DEC1, VPU_MEM_POWER_DOWN); - if (!legacy_vpp) + if (!legacy_vpp) { switch_vpu_mem_pd_vmod( VPU_VD2_SCALE, VPU_MEM_POWER_DOWN); + WRITE_VCBUS_REG_BITS( + VD2_AFBCD1_MISC_CTRL, + 0x55, 0, 8); + } } if ((vpu_delay_work_flag & @@ -8874,10 +8882,12 @@ static int __init video_early_init(void) #endif #endif /* MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */ #else - if (!legacy_vpp) + if (!legacy_vpp) { WRITE_VCBUS_REG_BITS(VPP_OFIFO_SIZE, 0x1000, VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID); - else if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXTVBB)) + WRITE_VCBUS_REG_BITS( + VPP_MATRIX_CTRL, 0, 10, 5); + } else if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXTVBB)) WRITE_VCBUS_REG_BITS(VPP_OFIFO_SIZE, 0xfff, VPP_OFIFO_SIZE_BIT, VPP_OFIFO_SIZE_WID); #endif diff --git a/drivers/amlogic/media/video_sink/vpp.c b/drivers/amlogic/media/video_sink/vpp.c index ddbf37dbd8ca..0e246082f918 100644 --- a/drivers/amlogic/media/video_sink/vpp.c +++ b/drivers/amlogic/media/video_sink/vpp.c @@ -404,7 +404,8 @@ static int force_filter_mode = 1; MODULE_PARM_DESC(force_filter_mode, "force_filter_mode"); module_param(force_filter_mode, int, 0664); #endif -bool super_scaler = 1; +/*temp disable sr for power test*/ +bool super_scaler; static unsigned int sr_support; static u32 sr_reg_offt; static unsigned int super_debug; diff --git a/drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.c b/drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.c index 229905b61102..cdb84aeef38e 100644 --- a/drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.c +++ b/drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.c @@ -4169,3 +4169,16 @@ void vdin_source_bitdepth_reinit(struct vdin_dev_s *devp) vdin_set_source_bitdepth(devp, vf); } } + +void vdin_clk_onoff(struct vdin_dev_s *devp, bool onoff) +{ + unsigned int offset = devp->addr_offset; + + if (onoff) { + wr(offset, VDIN_COM_GCLK_CTRL, 0); + wr(offset, VDIN_COM_GCLK_CTRL2, 0); + } else { + wr(offset, VDIN_COM_GCLK_CTRL, 0x55555555); + wr(offset, VDIN_COM_GCLK_CTRL2, 0x55555555); + } +} diff --git a/drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.h b/drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.h index 04f0b6303e00..afdd12884c5b 100644 --- a/drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.h +++ b/drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.h @@ -195,5 +195,6 @@ extern void vdin_set_display_ratio(struct vdin_dev_s *devp, struct vframe_s *vf); extern void vdin_source_bitdepth_reinit(struct vdin_dev_s *devp); extern void set_invert_top_bot(bool invert_flag); +extern void vdin_clk_onoff(struct vdin_dev_s *devp, bool onoff); #endif diff --git a/drivers/amlogic/media/vin/tvin/vdin/vdin_drv.c b/drivers/amlogic/media/vin/tvin/vdin/vdin_drv.c index 3a33e43d45ba..dd0e0398c8e2 100644 --- a/drivers/amlogic/media/vin/tvin/vdin/vdin_drv.c +++ b/drivers/amlogic/media/vin/tvin/vdin/vdin_drv.c @@ -202,6 +202,8 @@ int vdin_open_fe(enum tvin_port_e port, int index, struct vdin_dev_s *devp) /* clear color para*/ memset(&devp->prop, 0, sizeof(devp->prop)); + /*enable clk*/ + vdin_clk_onoff(devp, true); vdin_set_default_regmap(devp->addr_offset); /*only for vdin0*/ if (devp->urgent_en && (devp->index == 0)) @@ -594,6 +596,7 @@ void vdin_stop_dec(struct vdin_dev_s *devp) ((devp->parm.port != TVIN_PORT_CVBS3) || ((devp->flags & VDIN_FLAG_SNOW_FLAG) == 0))) devp->frontend->dec_ops->stop(devp->frontend, devp->parm.port); + vdin_set_default_regmap(devp->addr_offset); /*only for vdin0*/ if (devp->urgent_en && (devp->index == 0)) @@ -678,6 +681,7 @@ int start_tvin_service(int no, struct vdin_parm_s *para) /*disable vsync irq until vdin configured completely*/ disable_irq_nosync(devp->irq); } + vdin_clk_onoff(devp, true); /*config the vdin use default value*/ vdin_set_default_regmap(devp->addr_offset); /*only for vdin0*/ @@ -2460,6 +2464,7 @@ static int vdin_drv_probe(struct platform_device *pdev) } /*disable vdin hardware*/ vdin_enable_module(vdevp->addr_offset, false); + vdin_clk_onoff(vdevp, false); /*enable auto cutwindow for atv*/ if (vdevp->index == 0) { vdevp->auto_cutwindow_en = 1;