From 6b47e41786d831c4ebcb3393133876cc2f4a07c9 Mon Sep 17 00:00:00 2001 From: Yandong Lin Date: Tue, 19 Aug 2025 16:16:47 +0800 Subject: [PATCH] video: rockchip: mpp: rkvenc2: Fix the timeout threshold config issue Change-Id: If08868806b167fa7d6b2dfd75b6ad0f44fde70a7 Signed-off-by: Yandong Lin --- drivers/video/rockchip/mpp/mpp_rkvenc2.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/video/rockchip/mpp/mpp_rkvenc2.c b/drivers/video/rockchip/mpp/mpp_rkvenc2.c index 61abd0cb6875..9e038d806e22 100644 --- a/drivers/video/rockchip/mpp/mpp_rkvenc2.c +++ b/drivers/video/rockchip/mpp/mpp_rkvenc2.c @@ -1474,13 +1474,10 @@ static void rkvenc2_calc_timeout_thd(struct mpp_dev *mpp) } /* - * When vepu_type is RKVENC_VEPU_510, multiplied by 256 core clock cycles, - * else use x1024 core clk cycles + * The frame timeout threshold is *1024 core clock cycles, + * but the sub module timeout threshold is 1/4 frame timeout. */ - if (hw->vepu_type == RKVENC_VEPU_510) - timeout_thd |= timeout_ms * (clk_get_rate(enc->core_clk_info.clk) / 256000); - else - timeout_thd |= timeout_ms * (clk_get_rate(enc->core_clk_info.clk) / 1024000); + timeout_thd |= timeout_ms * (clk_get_rate(enc->core_clk_info.clk) / 256000); mpp_write(mpp, RKVENC_WDG, timeout_thd); }