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ARM: tegra: Handle timers during LP2 idle ticks
Timer ticks aren't properly serviced while a CPU is in LP2 idle.
Although the Tegra LP2 idle code calls hrtimer_peek_ahead_timers,
because no IRQ regs have been saved, update_process_times is not
called, and thus the timer list is not serviced (and neither is
SMP rebalancing, etc.) This can cause significant delays
scheduling timer-based activity, especially on CPU 1 (which is
not servicing most other IRQs).
Colin Cross suggested a patch based on upstream review feedback
that uses clock notifiers to switch to the "broadcast" clock event
source ("timer0" Tegra timer 3) during LP2, which has a real
interrupt handler defined that calls the clock event handler in
IRQ context, allowing timers to be checked.
Change-Id: Ifa3f4ec662f07dc9636e433f278358f75b65d10c
Signed-off-by: Todd Poynor <toddpoynor@google.com>
This commit is contained in:
@@ -445,6 +445,7 @@ static int tegra_idle_enter_lp2(struct cpuidle_device *dev,
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return tegra_idle_enter_lp3(dev, state);
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local_irq_disable();
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
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local_fiq_disable();
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enter = ktime_get();
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@@ -463,11 +464,9 @@ static int tegra_idle_enter_lp2(struct cpuidle_device *dev,
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us = ktime_to_us(exit);
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local_fiq_enable();
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clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
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local_irq_enable();
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/* cpu clockevents may have been reset by powerdown */
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hrtimer_peek_ahead_timers();
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smp_rmb();
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state->exit_latency = tegra_lp2_exit_latency;
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state->target_residency = tegra_lp2_exit_latency +
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