From 6b8a759d366e7a6b9fb6381b4d38083c6a0ce9c2 Mon Sep 17 00:00:00 2001
From: Steven Liu <steven.liu@rock-chips.com>
Date: Tue, 12 Jan 2021 15:10:18 +0800
Subject: [PATCH] ARM: dts: rockchip: Fix UART pull-ups on rk3066a

Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Change-Id: I7466ab47baa86c81bf1f2fe47556aa03fbe67671
---
 arch/arm/boot/dts/rk3066a.dtsi | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi
index 1c12b4364104..d28d04f58e09 100644
--- a/arch/arm/boot/dts/rk3066a.dtsi
+++ b/arch/arm/boot/dts/rk3066a.dtsi
@@ -488,6 +488,10 @@
 			bias-pull-pin-default;
 		};
 
+		pcfg_pull_up: pcfg-pull-up {
+			bias-pull-up;
+		};
+
 		pcfg_pull_none: pcfg_pull_none {
 			bias-disable;
 		};
@@ -639,8 +643,8 @@
 
 		uart0 {
 			uart0_xfer: uart0-xfer {
-				rockchip,pins = <1 RK_PA0 1 &pcfg_pull_default>,
-						<1 RK_PA1 1 &pcfg_pull_default>;
+				rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up>,
+						<1 RK_PA1 1 &pcfg_pull_up>;
 			};
 
 			uart0_cts: uart0-cts {
@@ -654,8 +658,8 @@
 
 		uart1 {
 			uart1_xfer: uart1-xfer {
-				rockchip,pins = <1 RK_PA4 1 &pcfg_pull_default>,
-						<1 RK_PA5 1 &pcfg_pull_default>;
+				rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up>,
+						<1 RK_PA5 1 &pcfg_pull_up>;
 			};
 
 			uart1_cts: uart1-cts {
@@ -669,16 +673,16 @@
 
 		uart2 {
 			uart2_xfer: uart2-xfer {
-				rockchip,pins = <1 RK_PB0 1 &pcfg_pull_default>,
-						<1 RK_PB1 1 &pcfg_pull_default>;
+				rockchip,pins = <1 RK_PB0 1 &pcfg_pull_up>,
+						<1 RK_PB1 1 &pcfg_pull_up>;
 			};
 			/* no rts / cts for uart2 */
 		};
 
 		uart3 {
 			uart3_xfer: uart3-xfer {
-				rockchip,pins = <3 RK_PD3 1 &pcfg_pull_default>,
-						<3 RK_PD4 1 &pcfg_pull_default>;
+				rockchip,pins = <3 RK_PD3 1 &pcfg_pull_up>,
+						<3 RK_PD4 1 &pcfg_pull_up>;
 			};
 
 			uart3_cts: uart3-cts {