From 6c49045c2980dc52a7ad4eb7fbf765c2e5e5d48a Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Fri, 22 Mar 2019 17:20:45 +0800 Subject: [PATCH] PCI: rockchip: limit PCIe accessors within 1MB cfg space PCIe spec requires max cfg space size is 4KB, and the hierarchy of PCIe tree only support up to 256 devices. So the reserved cfg space for RC is 1MB per spec. If any callers access the cfg space out of range, the spec asks PCIe RC kick back 0xffffffff. However, Rockchip RC will crash if this happens. So the software should manually check the ECAM size in PCIe accessors to workaround it. Change-Id: If4d40add229f9c315eab6d99b290766695208daf Signed-off-by: Shawn Lin --- drivers/pci/host/pcie-rockchip.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 880c3de5249c..39eb1ac4bc91 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -385,7 +385,7 @@ static int rockchip_pcie_rd_other_conf(struct rockchip_pcie *rockchip, busdev = PCIE_ECAM_ADDR(bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where); - if (!IS_ALIGNED(busdev, size)) { + if (!IS_ALIGNED(busdev, size) || busdev >= SZ_1M) { *val = 0; return PCIBIOS_BAD_REGISTER_NUMBER; } @@ -411,7 +411,7 @@ static int rockchip_pcie_wr_other_conf(struct rockchip_pcie *rockchip, busdev = PCIE_ECAM_ADDR(bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn), where); - if (!IS_ALIGNED(busdev, size)) + if (!IS_ALIGNED(busdev, size) || busdev >= SZ_1M) return PCIBIOS_BAD_REGISTER_NUMBER; if (size == 4)