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https://github.com/hardkernel/linux.git
synced 2026-06-09 12:17:12 +09:00
Optimize ov2655 initialization
This commit is contained in:
@@ -33,6 +33,7 @@ struct reginfo
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/* init 800X600 SVGA */
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static struct reginfo ov2655_init_data[] =
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{
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#if 0
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{0x308c, 0x80},
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{0x308d, 0x0e},
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{0x360b, 0x00},
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@@ -254,6 +255,229 @@ static struct reginfo ov2655_init_data[] =
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{0x3086, 0x00},
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{0x0, 0x0}, //end flag
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#else
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{0x308c, 0x80},
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{0x308d, 0x0e},
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{0x360b, 0x00},
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{0x30b0, 0xff},
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{0x30b1, 0xff},
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{0x30b2, 0x24},
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{0x300e, 0x34},
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{0x300f, 0xa6},
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{0x3010, 0x81},
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{0x3082, 0x01},
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{0x30f4, 0x01},
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{0x3090, 0x3b},//0x33},
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{0x3091, 0xc0},
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{0x30ac, 0x42},
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{0x30d1, 0x08},
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{0x30a8, 0x56},
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{0x3015, 0x03},
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{0x3093, 0x00},
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{0x307e, 0xe5},
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{0x3079, 0x00},
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{0x30aa, 0x42},
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{0x3017, 0x40},
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{0x30f3, 0x82},
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{0x306a, 0x0c},
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{0x306d, 0x00},
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{0x336a, 0x3c},
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{0x3076, 0x6a},
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{0x30d9, 0x8c},
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{0x3016, 0x82},
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{0x3601, 0x30},
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{0x304e, 0x88},
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{0x30f1, 0x82},
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{0x306f, 0x14},
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{0x3012, 0x10},
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{0x3011, 0x01},
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{0x302a, 0x02},
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{0x302b, 0xE6},
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{0x3028, 0x07},
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{0x3029, 0x93},
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{0x3391, 0x06},
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{0x3394, 0x38},
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{0x3395, 0x38},
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{0x3015, 0x02},
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{0x302d, 0x00},
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{0x302e, 0x00},
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{0x3013, 0xf7},
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{0x3018, 0x80},
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{0x3019, 0x70},
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{0x301a, 0xd4},
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{0x30af, 0x00},
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{0x3048, 0x1f},
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{0x3049, 0x4e},
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{0x304a, 0x20},
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{0x304f, 0x20},
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{0x304b, 0x02},
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{0x304c, 0x00},
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{0x304d, 0x02},
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{0x304f, 0x20},
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{0x30a3, 0x10},
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{0x3013, 0xf7},
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{0x3014, 0x84},
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{0x3071, 0x00},
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{0x3070, 0x5d},
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{0x3073, 0x00},
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{0x3072, 0x5d},
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{0x301c, 0x07},
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{0x301d, 0x07},
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{0x304d, 0x42},
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{0x304a, 0x40},
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{0x304f, 0x40},
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{0x3095, 0x07},
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{0x3096, 0x16},
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{0x3097, 0x1d},
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{0x3020, 0x01},
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{0x3021, 0x18},
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{0x3022, 0x00},
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{0x3023, 0x06},
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{0x3024, 0x06},
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{0x3025, 0x58},
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{0x3026, 0x02},
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{0x3027, 0x61},
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{0x3088, 0x01},
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{0x3089, 0x68},
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{0x308a, 0x01},
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{0x308b, 0x20},
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{0x3316, 0x64},
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{0x3317, 0x25},
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{0x3318, 0x80},
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{0x3319, 0x08},
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{0x331a, 0x16},
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{0x331b, 0x12},
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{0x331c, 0x08},
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{0x331d, 0x38},
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{0x3100, 0x00},
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{0x3320, 0xfa},
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{0x3321, 0x11},
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{0x3322, 0x92},
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{0x3323, 0x01},
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{0x3324, 0x97},
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{0x3325, 0x02},
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{0x3326, 0xff},
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{0x3327, 0x0c},
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{0x3328, 0x10},
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{0x3329, 0x10},
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{0x332a, 0x58},
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{0x332b, 0x56},
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{0x332c, 0xbe},
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{0x332d, 0xe1},
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{0x332e, 0x3a},
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{0x332f, 0x36},
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{0x3330, 0x4d},
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{0x3331, 0x44},
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{0x3332, 0xf8},
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{0x3333, 0x0a},
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{0x3334, 0xf0},
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{0x3335, 0xf0},
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{0x3336, 0xf0},
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{0x3337, 0x40},
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{0x3338, 0x40},
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{0x3339, 0x40},
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{0x333a, 0x00},
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{0x333b, 0x00},
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{0x3380, 0x28},
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{0x3381, 0x48},
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{0x3382, 0x10},
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{0x3383, 0x22},
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{0x3384, 0xc0},
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{0x3385, 0xe2},
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{0x3386, 0xe2},
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{0x3387, 0xf2},
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{0x3388, 0x10},
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{0x3389, 0x98},
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{0x338a, 0x00},
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{0x3340, 0x04},
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{0x3341, 0x07},
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{0x3342, 0x19},
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{0x3343, 0x34},
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{0x3344, 0x4a},
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{0x3345, 0x5a},
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{0x3346, 0x67},
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{0x3347, 0x71},
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{0x3348, 0x7c},
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{0x3349, 0x8c},
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{0x334a, 0x9b},
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{0x334b, 0xa9},
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{0x334c, 0xc0},
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{0x334d, 0xd5},
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{0x334e, 0xe8},
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{0x334f, 0x20},
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{0x3350, 0x37},//0x33},
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{0x3351, 0x27},//0x28},
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{0x3352, 0x00},
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{0x3353, 0x16},
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{0x3354, 0x00},
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{0x3355, 0x85},
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{0x3356, 0x35},
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{0x3357, 0x28},
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{0x3358, 0x00},
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{0x3359, 0x13},
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{0x335a, 0x00},
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{0x335b, 0x85},
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{0x335c, 0x37},//0x34},
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{0x335d, 0x28},
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{0x335e, 0x00},
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{0x335f, 0x13},
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{0x3360, 0x00},
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{0x3361, 0x85},
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{0x3363, 0x70},
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{0x3364, 0x7f},
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{0x3365, 0x00},
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{0x3366, 0x00},
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{0x3362, 0x90},
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{0x3301, 0xff},
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{0x338B, 0x11},
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{0x338c, 0x10},
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{0x338d, 0x40},
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{0x3370, 0xd0},
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{0x3371, 0x00},
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{0x3372, 0x00},
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{0x3373, 0x30},
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{0x3374, 0x10},
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{0x3375, 0x10},
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{0x3376, 0x04},
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{0x3377, 0x00},
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{0x3378, 0x04},
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{0x3379, 0x80},
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{0x3069, 0x84},
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{0x307c, 0x13},//0x10},
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{0x3087, 0x02},
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{0x3300, 0xfc},
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{0x3302, 0x11},
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{0x3400, 0x02},
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{0x3606, 0x20},
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{0x3601, 0x30},
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{0x30f3, 0x83},
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{0x304e, 0x88},
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{0x30aa, 0x72},
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{0x30a3, 0x80},
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{0x30a1, 0x41},
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{0x3086, 0x0f},
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{0x3086, 0x00},
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{0x0, 0x0}, //end flag
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#endif
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};
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@@ -794,7 +1018,7 @@ static int ov2655_write(struct i2c_client *client, u16 reg, u8 val)
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msg->flags = client->flags;
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msg->buf = buf;
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msg->len = sizeof(buf);
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msg->scl_rate = 100*1000; /* ddl@rock-chips.com : 100kHz */
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msg->scl_rate = 400*1000; /* ddl@rock-chips.com : 100kHz */
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msg->read_type = I2C_NORMAL;
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cnt = 3;
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@@ -806,6 +1030,7 @@ static int ov2655_write(struct i2c_client *client, u16 reg, u8 val)
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if (err >= 0) {
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return 0;
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} else {
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OV2655_TR("\n Write reg failed, write again!\n");
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udelay(10);
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}
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}
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@@ -827,7 +1052,7 @@ static int ov2655_read(struct i2c_client *client, u16 reg, u8 *val)
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msg[0].flags = client->flags;
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msg[0].buf = buf;
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msg[0].len = sizeof(buf);
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msg[0].scl_rate = 100*1000; /* ddl@rock-chips.com : 100kHz */
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msg[0].scl_rate = 400*1000; /* ddl@rock-chips.com : 100kHz */
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msg[0].read_type = I2C_NO_STOP; /* */
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msg[1].addr = client->addr;
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@@ -877,8 +1102,9 @@ static int ov2655_init(struct v4l2_subdev *sd, u32 val)
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struct i2c_client *client = sd->priv;
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struct soc_camera_device *icd = client->dev.platform_data;
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struct ov2655 *ov2655 = to_ov2655(client);
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int ret,pid=0;
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char value;
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int ret;
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OV2655_TR("\n%s..%d.. *** ddl ***\n",__FUNCTION__,__LINE__);
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/* soft reset */
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ret = ov2655_write(client, 0x3012, 0x80);
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@@ -888,35 +1114,7 @@ static int ov2655_init(struct v4l2_subdev *sd, u32 val)
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return -ENODEV;
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}
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mdelay(5); //delay 5 microseconds
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/* check if it is an ov2655 sensor */
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ret = ov2655_read(client, 0x300a, &value);
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if (ret != 0) {
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OV2655_TR("read chip id high byte failed\n");
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ret = -ENODEV;
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goto OV2655_INIT_ERR;
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}
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pid |= (value << 8);
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ret = ov2655_read(client, 0x300b, &value);
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if (ret != 0) {
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OV2655_TR("read chip id low byte failed\n");
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ret = -ENODEV;
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goto OV2655_INIT_ERR;
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}
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pid |= (value & 0xff);
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if (pid == 0x2656) {
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ov2655->model = V4L2_IDENT_OV2655;
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} else {
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OV2655_TR("error: devicr mismatched pid = 0x%x ********************************\n", pid);
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mdelay(3000);
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ret = -ENODEV;
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goto OV2655_INIT_ERR;
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}
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mdelay(5); //delay 5 microseconds
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ret = ov2655_write_array(client, ov2655_init_data);
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if (ret != 0)
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@@ -925,8 +1123,8 @@ static int ov2655_init(struct v4l2_subdev *sd, u32 val)
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return ret;
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}
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icd->user_width = 800;
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icd->user_height = 600;
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icd->user_width = 352;
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icd->user_height = 288;
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/* sensor ov2655 information for initialization */
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ov2655->info_priv.whiteBalance = ov2655_controls[0].default_value;
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