diff --git a/drivers/amlogic/media_modules/common/chips/decoder_cpu_ver_info.c b/drivers/amlogic/media_modules/common/chips/decoder_cpu_ver_info.c new file mode 100644 index 000000000000..cae6c7b1e1f9 --- /dev/null +++ b/drivers/amlogic/media_modules/common/chips/decoder_cpu_ver_info.c @@ -0,0 +1,117 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include "decoder_cpu_ver_info.h" + +#define DECODE_CPU_VER_ID_NODE_NAME "cpu_ver_name" +#define AM_SUCESS 0 + +#define MAJOR_ID_START AM_MESON_CPU_MAJOR_ID_M6 + +static enum AM_MESON_CPU_MAJOR_ID cpu_ver_info[AM_MESON_CPU_MAJOR_ID_MAX - MAJOR_ID_START]= +{ + AM_MESON_CPU_MAJOR_ID_M6, + AM_MESON_CPU_MAJOR_ID_M6TV, + AM_MESON_CPU_MAJOR_ID_M6TVL, + AM_MESON_CPU_MAJOR_ID_M8, + AM_MESON_CPU_MAJOR_ID_MTVD, + AM_MESON_CPU_MAJOR_ID_M8B, + AM_MESON_CPU_MAJOR_ID_MG9TV, + AM_MESON_CPU_MAJOR_ID_M8M2, + AM_MESON_CPU_MAJOR_ID_UNUSE, + AM_MESON_CPU_MAJOR_ID_GXBB, + AM_MESON_CPU_MAJOR_ID_GXTVBB, + AM_MESON_CPU_MAJOR_ID_GXL, + AM_MESON_CPU_MAJOR_ID_GXM, + AM_MESON_CPU_MAJOR_ID_TXL, + AM_MESON_CPU_MAJOR_ID_TXLX, + AM_MESON_CPU_MAJOR_ID_AXG, + AM_MESON_CPU_MAJOR_ID_GXLX, + AM_MESON_CPU_MAJOR_ID_TXHD, + AM_MESON_CPU_MAJOR_ID_G12A, + AM_MESON_CPU_MAJOR_ID_G12B +}; + +static const struct of_device_id cpu_ver_of_match[] = { + { + .compatible = "amlogic, cpu-major-id-axg", + .data = &cpu_ver_info[AM_MESON_CPU_MAJOR_ID_AXG - MAJOR_ID_START], + }, + + { + .compatible = "amlogic, cpu-major-id-g12a", + .data = &cpu_ver_info[AM_MESON_CPU_MAJOR_ID_G12A - MAJOR_ID_START], + }, + + { + .compatible = "amlogic, cpu-major-id-gxl", + .data = &cpu_ver_info[AM_MESON_CPU_MAJOR_ID_GXL - MAJOR_ID_START], + }, + + { + .compatible = "amlogic, cpu-major-id-gxm", + .data = &cpu_ver_info[AM_MESON_CPU_MAJOR_ID_GXM - MAJOR_ID_START], + }, + + { + .compatible = "amlogic, cpu-major-id-txl", + .data = &cpu_ver_info[AM_MESON_CPU_MAJOR_ID_TXL - MAJOR_ID_START], + }, + + { + .compatible = "amlogic, cpu-major-id-txlx", + .data = &cpu_ver_info[AM_MESON_CPU_MAJOR_ID_TXLX - MAJOR_ID_START], + }, + {}, +}; + +bool get_cpu_id_from_dtb(enum AM_MESON_CPU_MAJOR_ID *pidType) +{ + struct device_node *pNode = NULL; + struct platform_device* pDev = NULL; + const struct of_device_id *pMatch = NULL; + + pNode = of_find_node_by_name(NULL, DECODE_CPU_VER_ID_NODE_NAME); + if (NULL == pNode) + { + pr_info("No find node.\n"); + return -EINVAL; + } + + pDev = of_find_device_by_node(pNode); + if (NULL == pNode) + { + return -EINVAL; + } + + pMatch = of_match_device(cpu_ver_of_match, &pDev->dev); + + if (NULL == pMatch) + { + pr_info("No find of_match_device\n"); + return -EINVAL; + } + + *pidType = *(enum AM_MESON_CPU_MAJOR_ID *)pMatch->data; + + return AM_SUCESS; +} + +enum AM_MESON_CPU_MAJOR_ID get_cpu_major_id(void) +{ + enum AM_MESON_CPU_MAJOR_ID id_type = AM_MESON_CPU_MAJOR_ID_MAX; + + if (AM_SUCESS == get_cpu_id_from_dtb(&id_type)) + { + return id_type; + } + + return (enum AM_MESON_CPU_MAJOR_ID)get_cpu_type(); +} + +EXPORT_SYMBOL(get_cpu_major_id); diff --git a/drivers/amlogic/media_modules/common/chips/decoder_cpu_ver_info.h b/drivers/amlogic/media_modules/common/chips/decoder_cpu_ver_info.h new file mode 100644 index 000000000000..371794dfd31e --- /dev/null +++ b/drivers/amlogic/media_modules/common/chips/decoder_cpu_ver_info.h @@ -0,0 +1,30 @@ +#ifndef DECODER_CPU_VER_INFO_H +#define DECODER_CPU_VER_INFO_H + +enum AM_MESON_CPU_MAJOR_ID +{ + AM_MESON_CPU_MAJOR_ID_M6 = 0x16, + AM_MESON_CPU_MAJOR_ID_M6TV = 0x17, + AM_MESON_CPU_MAJOR_ID_M6TVL = 0x18, + AM_MESON_CPU_MAJOR_ID_M8 = 0x19, + AM_MESON_CPU_MAJOR_ID_MTVD = 0x1A, + AM_MESON_CPU_MAJOR_ID_M8B = 0x1B, + AM_MESON_CPU_MAJOR_ID_MG9TV = 0x1C, + AM_MESON_CPU_MAJOR_ID_M8M2 = 0x1D, + AM_MESON_CPU_MAJOR_ID_UNUSE = 0x1E, + AM_MESON_CPU_MAJOR_ID_GXBB = 0x1F, + AM_MESON_CPU_MAJOR_ID_GXTVBB = 0x20, + AM_MESON_CPU_MAJOR_ID_GXL = 0x21, + AM_MESON_CPU_MAJOR_ID_GXM = 0x22, + AM_MESON_CPU_MAJOR_ID_TXL = 0x23, + AM_MESON_CPU_MAJOR_ID_TXLX = 0x24, + AM_MESON_CPU_MAJOR_ID_AXG = 0x25, + AM_MESON_CPU_MAJOR_ID_GXLX = 0x26, + AM_MESON_CPU_MAJOR_ID_TXHD = 0x27, + AM_MESON_CPU_MAJOR_ID_G12A = 0x28, + AM_MESON_CPU_MAJOR_ID_G12B = 0x29, + AM_MESON_CPU_MAJOR_ID_MAX, +}; + +enum AM_MESON_CPU_MAJOR_ID get_cpu_major_id(void); +#endif diff --git a/drivers/amlogic/media_modules/common/media_clock/Makefile b/drivers/amlogic/media_modules/common/media_clock/Makefile index 994857a05219..975b5e57c452 100644 --- a/drivers/amlogic/media_modules/common/media_clock/Makefile +++ b/drivers/amlogic/media_modules/common/media_clock/Makefile @@ -3,3 +3,4 @@ media_clock-objs += ../chips/chips.o media_clock-objs += clk/clkg12.o media_clock-objs += clk/clk.o media_clock-objs += switch/amports_gate.o +media_clock-objs += ../chips/decoder_cpu_ver_info.o diff --git a/drivers/amlogic/media_modules/common/media_clock/clk/clk.c b/drivers/amlogic/media_modules/common/media_clock/clk/clk.c index 4ffaf12bfb46..b60a08d0805b 100644 --- a/drivers/amlogic/media_modules/common/media_clock/clk/clk.c +++ b/drivers/amlogic/media_modules/common/media_clock/clk/clk.c @@ -33,6 +33,7 @@ #include "../../chips/chips.h" #include "clk_priv.h" #include +#include "../../chips/decoder_cpu_ver_info.h" #define p_vdec() (get_current_vdec_chip()->clk_mgr[VDEC_1]) #define p_vdec2() (get_current_vdec_chip()->clk_mgr[VDEC_2]) @@ -336,7 +337,7 @@ int vdec_source_changed_for_clk_set(int format, int width, int height, int fps) || format == VFORMAT_AVS2) { ret_clk = hevc_clock_set(clk); clock_source_wxhxfps_saved[VDEC_HEVC] = width * height * fps; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { ret_clk = hevc_back_clock_set(clk); clock_source_wxhxfps_saved[VDEC_HEVCB] = width * height * fps; } @@ -344,7 +345,7 @@ int vdec_source_changed_for_clk_set(int format, int width, int height, int fps) ret_clk = hcodec_clock_set(clk); clock_source_wxhxfps_saved[VDEC_HCODEC] = width * height * fps; } else if (format == VFORMAT_H264_4K2K && - get_cpu_type() == MESON_CPU_MAJOR_ID_M8) { + get_cpu_major_id() == AM_MESON_CPU_MAJOR_ID_M8) { ret_clk = vdec2_clock_set(clk); clock_source_wxhxfps_saved[VDEC_2] = width * height * fps; ret_clk = vdec_clock_set(clk); @@ -363,7 +364,7 @@ static int register_vdec_clk_mgr_per_cpu(int cputype, struct chip_vdec_clk_s *mgr; - if (cputype != get_cpu_type() || vdec_type >= VDEC_MAX) { + if (cputype != get_cpu_major_id() || vdec_type >= VDEC_MAX) { /* *pr_info("ignore vdec clk mgr for vdec[%d] cpu=%d\n", *vdec_type, cputype); @@ -414,7 +415,7 @@ static int register_vdec_clk_setting_per_cpu(int cputype, struct clk_set_setting *p_setting; - if (cputype != get_cpu_type()) { + if (cputype != get_cpu_major_id()) { /* *pr_info("ignore clk_set_setting for cpu=%d\n", *cputype); diff --git a/drivers/amlogic/media_modules/common/media_clock/clk/clk.h b/drivers/amlogic/media_modules/common/media_clock/clk/clk.h index 5fefcbc6c335..9e6c02588b8b 100644 --- a/drivers/amlogic/media_modules/common/media_clock/clk/clk.h +++ b/drivers/amlogic/media_modules/common/media_clock/clk/clk.h @@ -130,7 +130,7 @@ static int __init vdec_init_clk(void) #endif #ifdef VDEC_HAS_HEVC register_vdec_clk_mgr(cpus, VDEC_HEVC, &vdec_hevc_clk_mgr); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= MESON_CPU_MAJOR_ID_G12A) register_vdec_clk_mgr(cpus, VDEC_HEVCB, &vdec_hevc_back_clk_mgr); #endif #ifdef VDEC_HAS_VDEC_HCODEC diff --git a/drivers/amlogic/media_modules/common/media_clock/clk/clkg12.c b/drivers/amlogic/media_modules/common/media_clock/clk/clkg12.c index d7111eb63eca..55e871bc7e4f 100644 --- a/drivers/amlogic/media_modules/common/media_clock/clk/clkg12.c +++ b/drivers/amlogic/media_modules/common/media_clock/clk/clkg12.c @@ -30,6 +30,8 @@ #include #include "../switch/amports_gate.h" +#include "../../chips/decoder_cpu_ver_info.h" + #define MHz (1000000) #define debug_print pr_info @@ -492,12 +494,12 @@ static int vdec_clock_init(void) { gp_pll_user_vdec = gp_pll_user_register("vdec", 0, gp_pll_user_cb_vdec); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) + if (get_cpu_major_id() >= MESON_CPU_MAJOR_ID_GXL) is_gp0_div2 = false; else is_gp0_div2 = true; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) { + if (get_cpu_major_id() >= MESON_CPU_MAJOR_ID_GXL) { pr_info("used fix clk for vdec clk source!\n"); //update_vdec_clk_config_settings(1); } @@ -755,7 +757,7 @@ static int hevc_back_clock_set(int clk) clk = hevcb_frq; } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_TXLX) { + if (get_cpu_major_id() >= MESON_CPU_MAJOR_ID_TXLX) { if ((READ_EFUSE_REG(EFUSE_LIC1) >> 28 & 0x1) && clk > 333) { pr_info("The hevcb clock limit to 333MHz.\n"); clk = 333; diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/avs/avs.c b/drivers/amlogic/media_modules/frame_provider/decoder/avs/avs.c index bb2ea4a504e7..2866c2a299f1 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/avs/avs.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/avs/avs.c @@ -41,6 +41,7 @@ #include "../utils/decoder_mmu_box.h" #include "../utils/decoder_bmmu_box.h" #include "../utils/firmware.h" +#include "../../../common/chips/decoder_cpu_ver_info.h" #define DRIVER_NAME "amvdec_avs" #define MODULE_NAME "amvdec_avs" @@ -1503,7 +1504,7 @@ static s32 vavs_init(void) vavs_local_init(); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXM) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXM) size = get_firmware_data(VIDEO_DEC_AVS, buf); else { if (firmware_sel == 1) @@ -1526,7 +1527,7 @@ static s32 vavs_init(void) if (size == 1) pr_info("tee load ok\n"); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXM) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXM) size = amvdec_loadmc_ex(VFORMAT_AVS, NULL, buf); else if (firmware_sel == 1) size = amvdec_loadmc_ex(VFORMAT_AVS, "avs_no_cabac", buf); @@ -1608,7 +1609,7 @@ static int amvdec_avs_probe(struct platform_device *pdev) pr_info("amvdec_avs memory resource undefined.\n"); return -EFAULT; } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXM || disable_longcabac_trans) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXM || disable_longcabac_trans) firmware_sel = 1; if (firmware_sel == 1) { @@ -1808,7 +1809,7 @@ static int __init amvdec_avs_driver_init_module(void) return -ENODEV; } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXBB) amvdec_avs_profile.profile = "avs+"; vcodec_profile_register(&amvdec_avs_profile); diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/avs2/vavs2.c b/drivers/amlogic/media_modules/frame_provider/decoder/avs2/vavs2.c index 16b3c29abefa..2ac3163c8aca 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/avs2/vavs2.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/avs2/vavs2.c @@ -53,6 +53,7 @@ #include #include "../utils/config_parser.h" #include "../utils/firmware.h" +#include "../../../common/chips/decoder_cpu_ver_info.h" #define MIX_STREAM_SUPPORT #define SUPPORT_4K2K @@ -4578,7 +4579,7 @@ static void vavs2_put_timer_func(unsigned long arg) if (dbg_cmd != 0) { if (dbg_cmd == 1) { u32 disp_laddr; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB && + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXBB && get_double_write_mode(dec) == 0) { disp_laddr = READ_VCBUS_REG(AFBC_BODY_BADDR) << 4; @@ -5672,7 +5673,7 @@ static int ammvdec_avs2_probe(struct platform_device *pdev) dec->platform_dev = pdev; dec->video_signal_type = 0; - if (get_cpu_type() < MESON_CPU_MAJOR_ID_TXLX) + if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_TXLX) dec->stat |= VP9_TRIGGER_FRAME_ENABLE; #if 1 if ((debug & IGNORE_PARAM_FROM_CONFIG) == 0 && @@ -5915,7 +5916,7 @@ static int __init amvdec_avs2_driver_init_module(void) return -ENODEV; } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXL /*&& get_cpu_type() != MESON_CPU_MAJOR_ID_GXLX*/) { if (vdec_is_support_4k()) amvdec_avs2_profile.profile = diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/h264/vh264.c b/drivers/amlogic/media_modules/frame_provider/decoder/h264/vh264.c index 40c7bbdc8dd2..ed6187349055 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/h264/vh264.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/h264/vh264.c @@ -54,6 +54,7 @@ #include #include "../utils/firmware.h" #include +#include "../../../common/chips/decoder_cpu_ver_info.h" #define DRIVER_NAME "amvdec_h264" #define MODULE_NAME "amvdec_h264" @@ -950,7 +951,7 @@ static void vh264_set_params(struct work_struct *work) if (ucode_type == UCODE_IP_ONLY_PARAM) mb_mv_byte = 96; mb_width = mb_width & 0xff; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB) { if (!mb_width && mb_total) mb_width = 256; } @@ -1032,7 +1033,7 @@ static void vh264_set_params(struct work_struct *work) if (max_dpb_size < max_reference_size) max_dpb_size = max_reference_size; if (max_dpb_size > 15 - && get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB + && get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB && (codec_mm_get_total_size() < 80 * SZ_1M)) { actual_dpb_size = max_reference_size + dpb_size_adj; @@ -2394,7 +2395,7 @@ static void vh264_prot_init(void) WRITE_VREG(AV_SCRATCH_I, (u32)(sei_data_buffer_phys - buf_offset)); WRITE_VREG(AV_SCRATCH_J, 0); /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON8 */ - if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) && !is_meson_mtvd_cpu()) { + if ((get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) && !is_meson_mtvd_cpu()) { /* pr_info("vh264 meson8 prot init\n"); */ WRITE_VREG(MDEC_PIC_DC_THRESH, 0x404038aa); } @@ -2444,7 +2445,7 @@ static int vh264_local_init(void) pr_debug("sync_outside=%d, use_idr_framerate=%d\n", sync_outside, use_idr_framerate); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB) size = V_BUF_ADDR_OFFSET_NEW; else size = V_BUF_ADDR_OFFSET; @@ -3140,7 +3141,7 @@ static int __init amvdec_h264_driver_init_module(void) pr_err("failed to register amvdec_h264 driver\n"); return -ENODEV; } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB && (codec_mm_get_total_size() > 80 * SZ_1M)) { amvdec_h264_profile.profile = "4k"; } diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/h264/vh264_4k2k.c b/drivers/amlogic/media_modules/frame_provider/decoder/h264/vh264_4k2k.c index 9363bcf9c377..557422d27983 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/h264/vh264_4k2k.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/h264/vh264_4k2k.c @@ -1776,7 +1776,7 @@ static int __init amvdec_h264_4k2k_driver_init_module(void) pr_err("failed to register amvdec_h264_4k2k driver\n"); return -ENODEV; } - if (get_cpu_type() < MESON_CPU_MAJOR_ID_GXTVBB) + if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_GXTVBB) vcodec_profile_register(&amvdec_h264_4k2k_profile); INIT_REG_NODE_CONFIGS("media.decoder", &h264_4k2k_node, "h264_4k2k", h264_4k2k_configs, CONFIG_FOR_RW); diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/h264_multi/vmh264.c b/drivers/amlogic/media_modules/frame_provider/decoder/h264_multi/vmh264.c index cb4e1b2850e0..b54ca8581590 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/h264_multi/vmh264.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/h264_multi/vmh264.c @@ -58,6 +58,7 @@ #include #include "../utils/config_parser.h" #include "../../../amvdec_ports/vdec_drv_base.h" +#include "../../../common/chips/decoder_cpu_ver_info.h" #undef pr_info #define pr_info printk @@ -7054,10 +7055,10 @@ static int ammvdec_h264_probe(struct platform_device *pdev) hw->mmu_enable = 0; if (force_enable_mmu && pdata->sys_info && - (get_cpu_type() >= MESON_CPU_MAJOR_ID_TXLX) && - (get_cpu_type() != MESON_CPU_MAJOR_ID_GXLX) && - (get_cpu_type() != MESON_CPU_MAJOR_ID_G12A) && - (get_cpu_type() != MESON_CPU_MAJOR_ID_G12B) && + (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TXLX) && + (get_cpu_major_id() != AM_MESON_CPU_MAJOR_ID_GXLX) && + (get_cpu_major_id() != AM_MESON_CPU_MAJOR_ID_G12A) && + (get_cpu_major_id() != AM_MESON_CPU_MAJOR_ID_G12B) && (pdata->sys_info->height * pdata->sys_info->width > 1920 * 1088)) hw->mmu_enable = 1; @@ -7311,10 +7312,10 @@ static int __init ammvdec_h264_driver_init_module(void) } if (vdec_is_support_4k()) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_TXLX) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TXLX) { ammvdec_h264_profile.profile = "4k, dwrite, compressed"; - } else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB) { + } else if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB) { ammvdec_h264_profile.profile = "4k"; } } diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/h265/vh265.c b/drivers/amlogic/media_modules/frame_provider/decoder/h265/vh265.c index 1dabfa403d9a..40b02e90a71d 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/h265/vh265.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/h265/vh265.c @@ -45,6 +45,8 @@ #include "../utils/decoder_bmmu_box.h" #include "../utils/config_parser.h" #include "../utils/firmware.h" +#include "../../../common/chips/decoder_cpu_ver_info.h" + #define AGAIN_HAS_THRESHOLD /*#define TEST_NO_BUF*/ /*#define HEVC_PIC_STRUCT_SUPPORT*/ @@ -2695,7 +2697,7 @@ static void init_pic_list_hw(struct hevc_state_s *hevc) int i; int cur_pic_num = MAX_REF_PIC_NUM; int dw_mode = get_double_write_mode(hevc); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXL) WRITE_VREG(HEVCD_MPP_ANC2AXI_TBL_CONF_ADDR, (0x1 << 1) | (0x1 << 2)); else @@ -2707,7 +2709,7 @@ static void init_pic_list_hw(struct hevc_state_s *hevc) cur_pic_num = i; break; } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXL) { if (hevc->mmu_enable) WRITE_VREG(HEVCD_MPP_ANC2AXI_TBL_DATA, hevc->m_PIC[i]->header_adr>>5); @@ -2719,7 +2721,7 @@ static void init_pic_list_hw(struct hevc_state_s *hevc) hevc->m_PIC[i]->mc_y_adr | (hevc->m_PIC[i]->mc_canvas_y << 8) | 0x1); if (dw_mode & 0x10) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXL) { if (hevc->mmu_enable) WRITE_VREG(HEVCD_MPP_ANC2AXI_TBL_DATA, hevc->m_PIC[i]->header_adr>>5); @@ -2737,7 +2739,7 @@ static void init_pic_list_hw(struct hevc_state_s *hevc) if (cur_pic_num == 0) return; for (; i < MAX_REF_PIC_NUM; i++) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXL) { if (hevc->mmu_enable) WRITE_VREG(HEVCD_MPP_ANC2AXI_TBL_DATA, hevc->m_PIC[cur_pic_num-1]->header_adr>>5); @@ -3507,7 +3509,7 @@ static void hevc_config_work_space_hw(struct hevc_state_s *hevc) WRITE_VREG(HEVC_PPS_BUFFER, buf_spec->pps.buf_start); WRITE_VREG(HEVC_SAO_UP, buf_spec->sao_up.buf_start); if (hevc->mmu_enable) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { WRITE_VREG(HEVC_ASSIST_MMU_MAP_ADDR, hevc->frame_mmu_map_phy_addr); hevc_print(hevc, H265_DEBUG_BUFMGR_MORE, "write HEVC_ASSIST_MMU_MAP_ADDR\n"); @@ -3595,7 +3597,7 @@ static void hevc_init_decoder_hw(struct hevc_state_s *hevc, if (!hevc->m_ins_flag) { data32 = READ_VREG(HEVC_STREAM_CONTROL); data32 = data32 | (1 << 0); /* stream_fetch_enable */ - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) data32 |= (0xf << 25); /*arwlen_axi_max*/ WRITE_VREG(HEVC_STREAM_CONTROL, data32); } @@ -4233,7 +4235,7 @@ static void config_sao_hw(struct hevc_state_s *hevc, union param_u *params) #endif /* DBLK CONFIG HERE */ if (hevc->new_pic) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { data32 = (0x57 << 8) | /* 1st/2nd write both enable*/ (0x0 << 0); /* h265 video format*/ if (hevc->pic_w >= 1280) @@ -4272,7 +4274,7 @@ static void config_sao_hw(struct hevc_state_s *hevc, union param_u *params) WRITE_VREG(HEVC_DBLK_CFG1, data32); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { /*if (debug & 0x80) {*/ data32 = 1 << 28; /* Debug only: sts1 chooses dblk_main*/ WRITE_VREG(HEVC_DBLK_STS1 + 4, data32); /* 0x3510 */ @@ -4315,7 +4317,7 @@ static void config_sao_hw(struct hevc_state_s *hevc, union param_u *params) data32 &= (~0xff0); /* data32 |= 0x670; // Big-Endian per 64-bit */ data32 |= endian; /* Big-Endian per 64-bit */ - if (get_cpu_type() < MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_G12A) { data32 &= (~0x3); /*[1]:dw_disable [0]:cm_disable*/ if (get_double_write_mode(hevc) == 0) data32 |= 0x2; /*disable double write*/ @@ -8683,7 +8685,7 @@ static void vh265_check_timer_func(unsigned long arg) if (dbg_cmd == 1) { u32 disp_laddr; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB && + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXBB && get_double_write_mode(hevc) == 0) { disp_laddr = READ_VCBUS_REG(AFBC_BODY_BADDR) << 4; @@ -9049,7 +9051,7 @@ static s32 vh265_init(struct hevc_state_s *hevc) #endif if (hevc->mmu_enable) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { size = get_firmware_data(VIDEO_DEC_HEVC, fw->data); hevc_print(hevc, 0, "vh265 ucode loaded!\n"); } else { @@ -9096,7 +9098,7 @@ static s32 vh265_init(struct hevc_state_s *hevc) pr_info ("tee load ok"); if (hevc->mmu_enable) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) ret = tee_load_video_fw((u32)VIDEO_DEC_HEVC, 0); else ret = tee_load_video_fw((u32)VIDEO_DEC_HEVC_MMU, 0); @@ -9967,7 +9969,7 @@ static void run(struct vdec_s *vdec, unsigned long mask, } if (hevc->mmu_enable) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) loadr = amhevc_vdec_loadmc_ex(vdec, "vh265_mc", hevc->fw->data); else @@ -10076,7 +10078,7 @@ static int amvdec_h265_probe(struct platform_device *pdev) hevc_print(hevc, 0, "%s\r\n", __func__); mutex_lock(&vh265_mutex); - if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB) && + if ((get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB) && (parser_sei_enable & 0x100) == 0) parser_sei_enable = 7; /*old 1*/ hevc->m_ins_flag = 0; @@ -10097,7 +10099,7 @@ static int amvdec_h265_probe(struct platform_device *pdev) return -EFAULT; } if (mmu_enable_force == 0) { - if (get_cpu_type() < MESON_CPU_MAJOR_ID_GXL + if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_GXL || double_write_mode == 0x10) hevc->mmu_enable = 0; else @@ -10469,7 +10471,7 @@ static int ammvdec_h265_probe(struct platform_device *pdev) } if (mmu_enable_force == 0) { - if (get_cpu_type() < MESON_CPU_MAJOR_ID_GXL + if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_GXL || hevc->double_write_mode == 0x10) hevc->mmu_enable = 0; else @@ -10503,7 +10505,7 @@ static int ammvdec_h265_probe(struct platform_device *pdev) } hevc->buf_size = work_buf_size; #endif - if ((get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB) && + if ((get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXTVBB) && (parser_sei_enable & 0x100) == 0) parser_sei_enable = 7; hevc->m_ins_flag = 1; @@ -10705,10 +10707,10 @@ static int __init amvdec_h265_driver_init_module(void) if (is_meson_m8m2_cpu()) { /* m8m2 support 4k */ amvdec_h265_profile.profile = "4k"; - } else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB) { + } else if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXBB) { amvdec_h265_profile.profile = "4k, 9bit, 10bit, dwrite, compressed"; - } else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_MG9TV) + } else if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_MG9TV) amvdec_h265_profile.profile = "4k"; } #endif diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/mpeg12/vmpeg12.c b/drivers/amlogic/media_modules/frame_provider/decoder/mpeg12/vmpeg12.c index 2e3a90edea7c..73d3f209e8a1 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/mpeg12/vmpeg12.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/mpeg12/vmpeg12.c @@ -56,6 +56,7 @@ MODULE_AMLOG(LOG_LEVEL_ERROR, 0, LOG_LEVEL_DESC, LOG_DEFAULT_MASK_DESC); #include "../utils/amvdec.h" #include "../utils/vdec.h" #include "../utils/firmware.h" +#include "../../../common/chips/decoder_cpu_ver_info.h" #define DRIVER_NAME "amvdec_mpeg12" #define MODULE_NAME "amvdec_mpeg12" @@ -1767,13 +1768,13 @@ static int vmpeg12_canvas_init(void) static int vmpeg12_prot_init(void) { int ret; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { int save_reg = READ_VREG(POWER_CTL_VLD); WRITE_VREG(DOS_SW_RESET0, (1 << 7) | (1 << 6) | (1 << 4)); WRITE_VREG(DOS_SW_RESET0, 0); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) { READ_VREG(DOS_SW_RESET0); READ_VREG(DOS_SW_RESET0); diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/utils/amvdec.c b/drivers/amlogic/media_modules/frame_provider/decoder/utils/amvdec.c index 7289fece7d21..03ee4542dc80 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/utils/amvdec.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/utils/amvdec.c @@ -44,6 +44,7 @@ #include #include "firmware.h" #include +#include "../../../common/chips/decoder_cpu_ver_info.h" #define MC_SIZE (4096 * 16) @@ -73,7 +74,7 @@ static void amvdec_pg_enable(bool enable) /* AMVDEC_CLK_GATE_ON(VLD_CLK); */ AMVDEC_CLK_GATE_ON(AMRISC); /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6TVD */ - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) WRITE_VREG(GCLK_EN, 0x3ff); /* #endif */ CLEAR_VREG_MASK(MDEC_PIC_DC_CTRL, 1 << 31); @@ -682,7 +683,7 @@ void amvdec_start(void) #endif /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */ - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { READ_VREG(DOS_SW_RESET0); READ_VREG(DOS_SW_RESET0); READ_VREG(DOS_SW_RESET0); @@ -779,7 +780,7 @@ void amvdec_stop(void) } /* #if MESON_CPU_TYPE >= MESON_CPU_TYPE_MESON6 */ - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { READ_VREG(DOS_SW_RESET0); READ_VREG(DOS_SW_RESET0); READ_VREG(DOS_SW_RESET0); diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/utils/vdec.c b/drivers/amlogic/media_modules/frame_provider/decoder/utils/vdec.c index dd3a94e9c226..e086fbbde25f 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/utils/vdec.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/utils/vdec.c @@ -67,6 +67,7 @@ #include #include #include "secprot.h" +#include "../../../common/chips/decoder_cpu_ver_info.h" static DEFINE_MUTEX(vdec_mutex); @@ -324,7 +325,7 @@ EXPORT_SYMBOL(update_vdec_clk_config_settings); static bool hevc_workaround_needed(void) { - return (get_cpu_type() == MESON_CPU_MAJOR_ID_GXBB) && + return (get_cpu_major_id() == AM_MESON_CPU_MAJOR_ID_GXBB) && (get_meson_cpu_version(MESON_CPU_VERSION_LVL_MINOR) == GXBB_REV_A_MINOR); } @@ -2420,8 +2421,8 @@ void vdec_poweron(enum vdec_type_e core) READ_AOREG(AO_RTI_GEN_PWR_ISO0) & ~0xC0); /* reset DOS top registers */ WRITE_VREG(DOS_VDEC_MCRCC_STALL_CTRL, 0); - if (get_cpu_type() >= - MESON_CPU_MAJOR_ID_GXBB) { + if (get_cpu_major_id() >= + AM_MESON_CPU_MAJOR_ID_GXBB) { /* *enable VDEC_1 DMC request */ @@ -2561,8 +2562,8 @@ void vdec_poweroff(enum vdec_type_e core) } if (core == VDEC_1) { - if (get_cpu_type() >= - MESON_CPU_MAJOR_ID_GXBB) { + if (get_cpu_major_id() >= + AM_MESON_CPU_MAJOR_ID_GXBB) { /* disable VDEC_1 DMC REQ*/ unsigned long flags; @@ -2623,7 +2624,7 @@ void vdec_poweroff(enum vdec_type_e core) /* disable hevc clock */ hevc_clock_off(); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) hevc_back_clock_off(); /* hevc power off */ @@ -2920,7 +2921,7 @@ static ssize_t amrisc_regs_show(struct class *class, unsigned int val; ssize_t ret; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) { mutex_lock(&vdec_mutex); if (!vdec_on(VDEC_1)) { mutex_unlock(&vdec_mutex); @@ -2928,7 +2929,7 @@ static ssize_t amrisc_regs_show(struct class *class, ret = pbuf - buf; return ret; } - } else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + } else if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { /*TODO:M6 define */ /* * switch_mod_gate_by_type(MOD_VDEC, 1); @@ -2941,9 +2942,9 @@ static ssize_t amrisc_regs_show(struct class *class, pbuf += sprintf(pbuf, "%s(%#x)\t:%#x(%d)\n", regs[i].name, regs[i].offset, val, val); } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) mutex_unlock(&vdec_mutex); - else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + else if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { /*TODO:M6 define */ /* * switch_mod_gate_by_type(MOD_VDEC, 0); @@ -2967,7 +2968,7 @@ static ssize_t dump_trace_show(struct class *class, ret = pbuf - buf; return ret; } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) { mutex_lock(&vdec_mutex); if (!vdec_on(VDEC_1)) { mutex_unlock(&vdec_mutex); @@ -2976,7 +2977,7 @@ static ssize_t dump_trace_show(struct class *class, ret = pbuf - buf; return ret; } - } else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + } else if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { /*TODO:M6 define */ /* * switch_mod_gate_by_type(MOD_VDEC, 1); @@ -3005,9 +3006,9 @@ static ssize_t dump_trace_show(struct class *class, i += 16; }; pr_info("dump trace steps:%d finished\n", debug_trace_num); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) mutex_unlock(&vdec_mutex); - else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + else if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { /*TODO:M6 define */ /* * switch_mod_gate_by_type(MOD_VDEC, 0); @@ -3439,7 +3440,7 @@ static ssize_t dump_risc_mem_show(struct class *class, char *pbuf = buf; int ret; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) { mutex_lock(&vdec_mutex); if (!vdec_on(VDEC_1)) { mutex_unlock(&vdec_mutex); @@ -3447,7 +3448,7 @@ static ssize_t dump_risc_mem_show(struct class *class, ret = pbuf - buf; return ret; } - } else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + } else if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { /*TODO:M6 define */ /* * switch_mod_gate_by_type(MOD_VDEC, 1); @@ -3467,9 +3468,9 @@ static ssize_t dump_risc_mem_show(struct class *class, } /*done*/ - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) mutex_unlock(&vdec_mutex); - else if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + else if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { /*TODO:M6 define */ /* * switch_mod_gate_by_type(MOD_VDEC, 0); @@ -3737,12 +3738,12 @@ static int vdec_probe(struct platform_device *pdev) vdec_core->cma_dev = &pdev->dev; - if (get_cpu_type() < MESON_CPU_MAJOR_ID_M8) { + if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_M8) { /* default to 250MHz */ vdec_clock_hi_enable(); } - if (get_cpu_type() == MESON_CPU_MAJOR_ID_GXBB) { + if (get_cpu_major_id() == AM_MESON_CPU_MAJOR_ID_GXBB) { /* set vdec dmc request to urgent */ WRITE_DMCREG(DMC_AM5_CHAN_CTRL, 0x3f203cf); } diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/vp9/vvp9.c b/drivers/amlogic/media_modules/frame_provider/decoder/vp9/vvp9.c index df2880dffd39..f45cded1c3e8 100644 --- a/drivers/amlogic/media_modules/frame_provider/decoder/vp9/vvp9.c +++ b/drivers/amlogic/media_modules/frame_provider/decoder/vp9/vvp9.c @@ -53,6 +53,7 @@ #include #include "../utils/config_parser.h" #include "../utils/firmware.h" +#include "../../../common/chips/decoder_cpu_ver_info.h" #define MIX_STREAM_SUPPORT #define SUPPORT_4K2K @@ -5147,7 +5148,7 @@ static void config_sao_hw(struct VP9Decoder_s *pbi, union param_u *params) data32 &= (~0xff0); /* data32 |= 0x670; // Big-Endian per 64-bit */ data32 |= endian; /* Big-Endian per 64-bit */ - if (get_cpu_type() < MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_G12A) { data32 &= (~0x3); /*[1]:dw_disable [0]:cm_disable*/ if (get_double_write_mode(pbi) == 0) data32 |= 0x2; /*disable double write*/ @@ -5255,7 +5256,7 @@ static void vp9_config_work_space_hw(struct VP9Decoder_s *pbi, u32 mask) buf_spec->ipp.buf_start); WRITE_VREG(HEVC_SAO_UP, buf_spec->sao_up.buf_start); WRITE_VREG(HEVC_SCALELUT, buf_spec->scalelut.buf_start); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { /* cfg_addr_adp*/ WRITE_VREG(HEVC_DBLK_CFGE, buf_spec->dblk_para.buf_start); if (debug & VP9_DEBUG_BUFMGR_MORE) @@ -5313,7 +5314,7 @@ static void vp9_config_work_space_hw(struct VP9Decoder_s *pbi, u32 mask) WRITE_VREG(VP9_PROB_SWAP_BUFFER, pbi->prob_buffer_phy_addr); WRITE_VREG(VP9_COUNT_SWAP_BUFFER, pbi->count_buffer_phy_addr); #ifdef VP9_10B_MMU - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) WRITE_VREG(HEVC_ASSIST_MMU_MAP_ADDR, pbi->frame_mmu_map_phy_addr); else WRITE_VREG(VP9_MMU_MAP_BUFFER, pbi->frame_mmu_map_phy_addr); @@ -5478,7 +5479,7 @@ void vp9_loop_filter_init(struct VP9Decoder_s *pbi) } /*video format is VP9*/ - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { unsigned int data32; data32 = (0x57 << 8) | /*1st/2nd write both enable*/ (0x1 << 0); /*vp9 video format*/ @@ -7159,7 +7160,7 @@ int continue_decoding(struct VP9Decoder_s *pbi) = (vp9_param.p.seg_lf_info[i] & 0x100) ? -(vp9_param.p.seg_lf_info[i] & 0x3f) : (vp9_param.p.seg_lf_info[i] & 0x3f); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { /*Set pipeline mode*/ uint32_t lpf_data32 = READ_VREG(HEVC_DBLK_CFGB); /*dblk pipeline mode=1 for performance*/ @@ -7762,7 +7763,7 @@ static void vvp9_put_timer_func(unsigned long arg) if (dbg_cmd == 1) { u32 disp_laddr; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXBB && + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXBB && get_double_write_mode(pbi) == 0) { disp_laddr = READ_VCBUS_REG(AFBC_BODY_BADDR) << 4; @@ -7868,7 +7869,7 @@ static void vvp9_prot_init(struct VP9Decoder_s *pbi, u32 mask) ; WRITE_VREG(HEVC_STREAM_CONTROL, data32); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { if (debug & VP9_DEBUG_BUFMGR) pr_info("[test.c] Config STREAM_FIFO_CTL\n"); data32 = READ_VREG(HEVC_STREAM_FIFO_CTL); @@ -8061,7 +8062,7 @@ static s32 vvp9_init(struct VP9Decoder_s *pbi) } else #endif - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) size = get_firmware_data(VIDEO_DEC_VP9, fw->data); else size = get_firmware_data(VIDEO_DEC_VP9_MMU, fw->data); @@ -8100,7 +8101,7 @@ static s32 vvp9_init(struct VP9Decoder_s *pbi) if (size == 1) { pr_info ("tee load ok\n"); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) ret = tee_load_video_fw((u32)VIDEO_DEC_VP9, 0); else ret = tee_load_video_fw((u32)VIDEO_DEC_VP9_MMU, 0); @@ -8860,7 +8861,7 @@ static void run_front(struct vdec_s *vdec) vp9_print_cont(pbi, 0, "\r\n"); } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) ret = amhevc_loadmc_ex(VFORMAT_VP9, "vp9_mc", pbi->fw->data); else ret = amhevc_loadmc_ex(VFORMAT_VP9, NULL, pbi->fw->data); @@ -9283,7 +9284,7 @@ static int ammvdec_vp9_probe(struct platform_device *pdev) pbi->platform_dev = pdev; pbi->video_signal_type = 0; - if (get_cpu_type() < MESON_CPU_MAJOR_ID_TXLX) + if (get_cpu_major_id() < AM_MESON_CPU_MAJOR_ID_TXLX) pbi->stat |= VP9_TRIGGER_FRAME_ENABLE; #if 1 if ((debug & IGNORE_PARAM_FROM_CONFIG) == 0 && @@ -9554,7 +9555,7 @@ static int __init amvdec_vp9_driver_init_module(void) return -ENODEV; } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXL /*&& get_cpu_type() != MESON_CPU_MAJOR_ID_GXLX*/) { if (vdec_is_support_4k()) amvdec_vp9_profile.profile = diff --git a/drivers/amlogic/media_modules/stream_input/amports/adec.c b/drivers/amlogic/media_modules/stream_input/amports/adec.c index 923128f9dfed..9a594c6c3b0d 100644 --- a/drivers/amlogic/media_modules/stream_input/amports/adec.c +++ b/drivers/amlogic/media_modules/stream_input/amports/adec.c @@ -29,7 +29,7 @@ #include #include #include "amports_priv.h" - +#include "../../common/chips/decoder_cpu_ver_info.h" #define INFO_VALID ((astream_dev) && (astream_dev->format)) struct astream_device_s { @@ -328,7 +328,7 @@ s32 astream_dev_register(void) goto err_2; } - if (MESON_CPU_MAJOR_ID_TXL < get_cpu_type()) { + if (AM_MESON_CPU_MAJOR_ID_TXL < get_cpu_major_id()) { node = of_find_node_by_path("/codec_io/io_cbus_base"); if (!node) { pr_info("No io_cbus_base node found."); @@ -345,7 +345,7 @@ s32 astream_dev_register(void) astream_dev->offset = -0x100; /*need to offset -0x180 in g12a.*/ - if (MESON_CPU_MAJOR_ID_G12A <= get_cpu_type()) + if (AM_MESON_CPU_MAJOR_ID_G12A <= get_cpu_major_id()) astream_dev->offset = -0x180; astream_uio_info.mem[0].addr = diff --git a/drivers/amlogic/media_modules/stream_input/amports/amstream.c b/drivers/amlogic/media_modules/stream_input/amports/amstream.c index 6546633df359..3bd37084837f 100644 --- a/drivers/amlogic/media_modules/stream_input/amports/amstream.c +++ b/drivers/amlogic/media_modules/stream_input/amports/amstream.c @@ -79,6 +79,7 @@ #include #include "../../frame_provider/decoder/utils/firmware.h" #include "../../common/chips/chips.h" +#include "../../common/chips/decoder_cpu_ver_info.h" //#define G12A_BRINGUP_DEBUG @@ -605,10 +606,10 @@ static int video_port_init(struct port_priv_s *priv, (priv->vdec->sys_info->height * priv->vdec->sys_info->width) > 1920*1088) { pbuf->for_4k = 1; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_TXLX + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TXLX && port->vformat == VFORMAT_H264) { amports_switch_gate("clk_hevc_mux", 1); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) amports_switch_gate("clk_hevcb_mux", 1); vdec_poweron(VDEC_HEVC); @@ -875,7 +876,7 @@ static int amstream_port_init(struct port_priv_s *priv) mutex_lock(&amstream_mutex); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) { r = check_efuse_chip(port->vformat); if (r) { pr_info("No support video format %d.\n", port->vformat); @@ -1598,11 +1599,11 @@ static int amstream_open(struct inode *inode, struct file *file) priv->port = port; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { /* TODO: mod gate */ /* switch_mod_gate_by_name("demux", 1); */ amports_switch_gate("demux", 1); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) { /* TODO: clc gate */ /* CLK_GATE_ON(HIU_PARSER_TOP); */ amports_switch_gate("parser_top", 1); @@ -1617,7 +1618,7 @@ static int amstream_open(struct inode *inode, struct file *file) if (port->type & (PORT_TYPE_MPTS | PORT_TYPE_HEVC)) { amports_switch_gate("clk_hevc_mux", 1); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_G12A) amports_switch_gate("clk_hevcb_mux", 1); vdec_poweron(VDEC_HEVC); } @@ -1627,7 +1628,7 @@ static int amstream_open(struct inode *inode, struct file *file) vdec_poweron(VDEC_1); } } else { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) { amports_switch_gate("clk_vdec_mux", 1); vdec_poweron(VDEC_1); } @@ -1738,16 +1739,16 @@ static int amstream_release(struct inode *inode, struct file *file) debug_file_pos = 0; } #endif - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { if (port->type & PORT_TYPE_VIDEO) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) { #ifndef CONFIG_AMLOGIC_MEDIA_MULTI_DEC if (has_hevc_vdec()) vdec_poweroff(VDEC_HEVC); vdec_poweroff(VDEC_1); #else - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_TXLX + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TXLX && port->vformat == VFORMAT_H264 && bufs[BUF_TYPE_VIDEO].for_4k) vdec_poweroff(VDEC_HEVC); @@ -1772,7 +1773,7 @@ static int amstream_release(struct inode *inode, struct file *file) /* amports_switch_gate("audio", 0); */ } - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M8) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M8) { /* TODO: clc gate */ /* CLK_GATE_OFF(HIU_PARSER_TOP); */ amports_switch_gate("parser_top", 0); @@ -3438,7 +3439,7 @@ static ssize_t bufs_show(struct class *class, struct class_attribute *attr, "\tbuf regbase:%#lx\n", p->reg_base); if (p->reg_base && p->flag & BUF_FLAG_IN_USE) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { /* TODO: mod gate */ /* switch_mod_gate_by_name("vdec", 1);*/ amports_switch_gate("vdec", 1); @@ -3450,7 +3451,7 @@ static ssize_t bufs_show(struct class *class, struct class_attribute *attr, pbuf += sprintf(pbuf, "\tbuf read pointer:%#x\n", stbuf_rp(p)); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_M6) { + if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_M6) { /* TODO: mod gate */ /* switch_mod_gate_by_name("vdec", 0);*/ amports_switch_gate("vdec", 0); @@ -3797,7 +3798,7 @@ static int amstream_probe(struct platform_device *pdev) REG_PATH_CONFIGS("media.amports", amports_configs); /* poweroff the decode core because dos can not be reset when reboot */ - if (get_cpu_type() == MESON_CPU_MAJOR_ID_G12A) + if (get_cpu_major_id() == AM_MESON_CPU_MAJOR_ID_G12A) vdec_power_reset(); return 0;