From 6e6bfa2b298a1c343a0a7d3d99117fa243bfcfbf Mon Sep 17 00:00:00 2001 From: Shunqian Zheng Date: Wed, 27 Nov 2019 11:47:05 +0800 Subject: [PATCH] media: i2c: jx_h65: fix gain > 4x flicker Fix bad timing and write the regs all in one including the 0x12(mode control) when starting up in .s_power(). To avoid bad mipi signal during mipi dphy enabling, let jx_h65 enter sleep mode right after .s_power(). Change-Id: Ib72e790093297d99fc8db385fb8bd8493e4fe52b Signed-off-by: Shunqian Zheng --- drivers/media/i2c/jx_h65.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/media/i2c/jx_h65.c b/drivers/media/i2c/jx_h65.c index 0f09b8641d54..61747bdd9536 100644 --- a/drivers/media/i2c/jx_h65.c +++ b/drivers/media/i2c/jx_h65.c @@ -270,7 +270,7 @@ static const struct regval jx_h65_1280x960_regs[] = { {0x70, 0x89}, {0x71, 0x8A}, {0x72, 0x68}, - {0x73, 0x33}, + {0x73, 0x53}, {0x74, 0x52}, {0x75, 0x2B}, {0x76, 0x40}, @@ -323,11 +323,12 @@ static const struct regval jx_h65_1280x960_regs[] = { {0x90, 0x00}, {0x79, 0x00}, {0x13, 0x81}, + {0x12, 0x00}, {0x45, 0x89}, {0x93, 0x68}, {REG_DELAY, 0x00}, {0x45, 0x19}, - {0x1F, 0x11}, + {0x1F, 0x01}, {REG_NULL, 0x00} }; @@ -739,6 +740,12 @@ static int jx_h65_s_power(struct v4l2_subdev *sd, int on) if (ret) goto unlock_and_return; + /* + * Enter sleep state to make sure not mipi output + * during rkisp init. + */ + __jx_h65_stop_stream(jx_h65); + mutex_unlock(&jx_h65->mutex); /* In case these controls are set before streaming */ ret = v4l2_ctrl_handler_setup(&jx_h65->ctrl_handler);