From 6f62dc64fe460ee1507ac670df93a209910b0e83 Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Wed, 24 Nov 2021 11:54:46 +0800 Subject: [PATCH] Revert "clk: rockchip: rk3588: export pclk_vopgrf id for vop" This reverts commit 9c9db5fd41ab9b10add36b089c7d21a2232090b7. Signed-off-by: Wyon Bi Change-Id: I11ef7f3e52cb7512acbc638a67e75c9295ddbbdd --- drivers/clk/rockchip/clk-rk3588.c | 2 -- include/dt-bindings/clock/rk3588-cru.h | 3 +-- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3588.c b/drivers/clk/rockchip/clk-rk3588.c index ede5ebd8003e..2958e18a077e 100644 --- a/drivers/clk/rockchip/clk-rk3588.c +++ b/drivers/clk/rockchip/clk-rk3588.c @@ -2203,8 +2203,6 @@ static struct rockchip_clk_branch rk3588_clk_branches[] __initdata = { COMPOSITE(DCLK_VOP3, "dclk_vop3", gpll_cpll_v0pll_aupll_p, 0, RK3588_CLKSEL_CON(113), 7, 2, MFLAGS, 0, 7, DFLAGS, RK3588_CLKGATE_CON(53), 2, GFLAGS), - GATE(PCLK_VOPGRF, "pclk_vopgrf", "pclk_vop_root", 0, - RK3588_CLKGATE_CON(53), 3, GFLAGS), GATE(PCLK_DSIHOST0, "pclk_dsihost0", "pclk_vop_root", 0, RK3588_CLKGATE_CON(53), 4, GFLAGS), GATE(PCLK_DSIHOST1, "pclk_dsihost1", "pclk_vop_root", 0, diff --git a/include/dt-bindings/clock/rk3588-cru.h b/include/dt-bindings/clock/rk3588-cru.h index d3f52217faaf..b9b6d2be52d0 100644 --- a/include/dt-bindings/clock/rk3588-cru.h +++ b/include/dt-bindings/clock/rk3588-cru.h @@ -709,9 +709,8 @@ #define CLK_CORE_LITCORE_PVTM 715 #define CLK_AUX16M_0 716 #define CLK_AUX16M_1 717 -#define PCLK_VOPGRF 718 -#define CLK_NR_CLKS (PCLK_VOPGRF + 1) +#define CLK_NR_CLKS (CLK_AUX16M_1 + 1) /********Name=SOFTRST_CON01,Offset=0xA04********/ #define SRST_A_TOP_BIU 19