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drm/bridge: synopsys: dw_hdmi: Add support for HBR / NLPCM Bitstream

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Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: Id8ae61602a28182a0288b7c1a6b13ab58f5283f6
This commit is contained in:
Sugar Zhang
2023-03-03 11:49:08 +08:00
committed by Tao Huang
parent 7ca7e7ce1f
commit 71612ae495
2 changed files with 25 additions and 0 deletions
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19
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c
View File

@@ -42,6 +42,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
struct dw_hdmi *hdmi = audio->hdmi;
u8 conf0 = 0;
u8 conf1 = 0;
u8 conf2 = 0;
u8 inputclkfs = 0;
/* it cares I2S only */
@@ -101,6 +102,23 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
return -EINVAL;
}
switch (fmt->bit_fmt) {
case SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE:
conf1 = HDMI_AUD_CONF1_WIDTH_21;
conf2 = (hparms->channels == 8) ? HDMI_AUD_CONF2_HBR : HDMI_AUD_CONF2_NLPCM;
break;
default:
/*
* dw-hdmi introduced insert_pcuv bit in version 2.10a.
* When set (1'b1), this bit enables the insertion of the PCUV
* (Parity, Channel Status, User bit and Validity) bits on the
* incoming audio stream (support limited to Linear PCM audio)
*/
if (hdmi_read(audio, HDMI_DESIGN_ID) >= 0x21)
conf2 = HDMI_AUD_CONF2_INSERT_PCUV;
break;
}
dw_hdmi_set_sample_rate(hdmi, hparms->sample_rate);
dw_hdmi_set_channel_status(hdmi, hparms->iec.status);
dw_hdmi_set_channel_count(hdmi, hparms->channels);
@@ -109,6 +127,7 @@ static int dw_hdmi_i2s_hw_params(struct device *dev, void *data,
hdmi_write(audio, inputclkfs, HDMI_AUD_INPUTCLKFS);
hdmi_write(audio, conf0, HDMI_AUD_CONF0);
hdmi_write(audio, conf1, HDMI_AUD_CONF1);
hdmi_write(audio, conf2, HDMI_AUD_CONF2);
return 0;
}

6
drivers/gpu/drm/bridge/synopsys/dw-hdmi.h
View File

@@ -967,8 +967,14 @@ enum {
HDMI_AUD_CONF1_MODE_BURST_1 = 0x60,
HDMI_AUD_CONF1_MODE_BURST_2 = 0x80,
HDMI_AUD_CONF1_WIDTH_16 = 0x10,
HDMI_AUD_CONF1_WIDTH_21 = 0x15,
HDMI_AUD_CONF1_WIDTH_24 = 0x18,
/* AUD_CONF2 filed values */
HDMI_AUD_CONF2_HBR = 0x1,
HDMI_AUD_CONF2_NLPCM = 0x2,
HDMI_AUD_CONF2_INSERT_PCUV = 0x04,
/* AUD_CTS3 field values */
HDMI_AUD_CTS3_N_SHIFT_OFFSET = 5,
HDMI_AUD_CTS3_N_SHIFT_MASK = 0xe0,