From 71a42f9f9613626542b36738c7536facc83b1f35 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Thu, 26 Mar 2020 15:54:42 +0800 Subject: [PATCH] ARM: dts: rv11xx-evb-v10: Drop clock limitation for sdmmc With drive strength issue solved, now sdmmc could reliably work as expected in UHS-I mode with 200MHz bus clock. Change-Id: Ie756b92c207875a397337a1ff2f598284e860650 Signed-off-by: Shawn Lin --- arch/arm/boot/dts/rv11xx-evb-v10.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boot/dts/rv11xx-evb-v10.dtsi b/arch/arm/boot/dts/rv11xx-evb-v10.dtsi index cc17c3e98964..166ce1e31201 100644 --- a/arch/arm/boot/dts/rv11xx-evb-v10.dtsi +++ b/arch/arm/boot/dts/rv11xx-evb-v10.dtsi @@ -928,7 +928,6 @@ cap-mmc-highspeed; cap-sd-highspeed; card-detect-delay = <200>; - max-frequency = <100000000>; rockchip,default-sample-phase = <90>; supports-sd; sd-uhs-sdr12;