From 71ddde314ef742a2b320a2e22b458bd968fa1289 Mon Sep 17 00:00:00 2001 From: Wyon bi Date: Wed, 12 Jan 2022 11:21:06 +0800 Subject: [PATCH] drm/bridge: analogix_dp: Use link train delay helper Signed-off-by: Wyon bi Change-Id: I1c75e259f8787f5029a1b8d1ba48035d2f645a39 --- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 10 ++++++++-- drivers/gpu/drm/bridge/analogix/analogix_dp_core.h | 1 + 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c index 4a1e90bdd8ab..9b72804010fb 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c @@ -485,7 +485,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp) u8 link_status[2], adjust_request[2]; u8 training_pattern = TRAINING_PTN2; - usleep_range(100, 101); + drm_dp_link_train_clock_recovery_delay(dp->dpcd); lane_count = dp->link_train.lane_count; @@ -559,7 +559,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp) u32 reg; u8 link_align, link_status[2], adjust_request[2]; - usleep_range(400, 401); + drm_dp_link_train_channel_eq_delay(dp->dpcd); lane_count = dp->link_train.lane_count; @@ -989,6 +989,12 @@ static int analogix_dp_commit(struct analogix_dp_device *dp) struct video_info *video = &dp->video_info; int ret; + ret = drm_dp_read_dpcd_caps(&dp->aux, dp->dpcd); + if (ret < 0) { + dev_err(dp->dev, "failed to read dpcd caps: %d\n", ret); + return ret; + } + if (device_property_read_bool(dp->dev, "panel-self-test")) return drm_dp_dpcd_writeb(&dp->aux, DP_EDP_CONFIGURATION_SET, DP_PANEL_SELF_TEST_ENABLE); diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h index 28f2aaa144ef..804a87d59fb4 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h @@ -186,6 +186,7 @@ struct analogix_dp_device { struct mutex panel_lock; bool panel_is_prepared; + u8 dpcd[DP_RECEIVER_CAP_SIZE]; struct analogix_dp_plat_data *plat_data; };