From 72bb4cf4a225b7085b837cc41ebeffc66ed1abbd Mon Sep 17 00:00:00 2001 From: David Wu Date: Sat, 13 Nov 2021 16:29:47 +0800 Subject: [PATCH] net: ethernet: stmmac: dwmac-rk: Fix delayline control for RK3588 The wrong choice is at GMAC1 RGMII delayline control. Fixes: 2627dcd2c9e9("net: ethernet: stmmac: dwmac-rk: Add gmac support for rk3588") Signed-off-by: David Wu Change-Id: Ibc31f4f8b0f8c23c7ca3b290f3d95ba34f03c05f --- drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 1869a27d6109..aa7ccf8f84ac 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -1404,10 +1404,10 @@ static const struct rk_gmac_ops rk3568_ops = { #define RK3588_GRF_GMAC_CON8 0X0320 #define RK3588_GRF_GMAC_CON9 0X0324 -#define RK3588_GMAC_RXCLK_DLY_ENABLE(id) GRF_BIT(3 + (id)) -#define RK3588_GMAC_RXCLK_DLY_DISABLE(id) GRF_CLR_BIT(3 + (id)) -#define RK3588_GMAC_TXCLK_DLY_ENABLE(id) GRF_BIT(2 + (id)) -#define RK3588_GMAC_TXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 + (id)) +#define RK3588_GMAC_RXCLK_DLY_ENABLE(id) GRF_BIT(2 * (id) + 3) +#define RK3588_GMAC_RXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 * (id) + 3) +#define RK3588_GMAC_TXCLK_DLY_ENABLE(id) GRF_BIT(2 * (id) + 2) +#define RK3588_GMAC_TXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 * (id) + 2) #define RK3588_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 8) #define RK3588_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 0)