From 72cdd4b68bf90e8b33f3588a8351a269f2c5c4d0 Mon Sep 17 00:00:00 2001
From: David Wu <david.wu@rock-chips.com>
Date: Fri, 20 Mar 2020 15:10:01 +0800
Subject: [PATCH] ARM: dts: rv1109: Move the phy definition out from dtsi level

It is best to put the definition of phy in dts, not in dtsi.

Change-Id: I9fd98446845d6f95018b5cdf2fe842b0829281df
Signed-off-by: David Wu <david.wu@rock-chips.com>
---
 arch/arm/boot/dts/rv1126.dtsi         | 10 ++--------
 arch/arm/boot/dts/rv11xx-evb-v10.dtsi | 12 ++++++++++++
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
index d700d52420ab..c49cc7612c87 100644
--- a/arch/arm/boot/dts/rv1126.dtsi
+++ b/arch/arm/boot/dts/rv1126.dtsi
@@ -1294,18 +1294,12 @@
 		snps,axi-config = <&stmmac_axi_setup>;
 		snps,mtl-rx-config = <&mtl_rx_setup>;
 		snps,mtl-tx-config = <&mtl_tx_setup>;
-		phy-handle = <&phy>;
 		status = "disabled";
 
-		mdio {
+		mdio: mdio {
+			compatible = "snps,dwmac-mdio";
 			#address-cells = <0x1>;
 			#size-cells = <0x0>;
-			compatible = "snps,dwmac-mdio";
-			phy: phy@0 {
-				compatible = "ethernet-phy-ieee802.3-c22";
-				device_type = "ethernet-phy";
-				reg = <0x0>;
-			};
 		};
 
 		stmmac_axi_setup: stmmac-axi-config {
diff --git a/arch/arm/boot/dts/rv11xx-evb-v10.dtsi b/arch/arm/boot/dts/rv11xx-evb-v10.dtsi
index 283ab3634219..0a28e1cd1827 100644
--- a/arch/arm/boot/dts/rv11xx-evb-v10.dtsi
+++ b/arch/arm/boot/dts/rv11xx-evb-v10.dtsi
@@ -102,16 +102,21 @@
 &gmac {
 	phy-mode = "rgmii";
 	clock_in_out = "input";
+
 	snps,reset-gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	/* Reset time is 20ms, 100ms for rtl8211f */
 	snps,reset-delays-us = <0 20000 100000>;
+
 	assigned-clocks = <&cru CLK_GMAC_SRC>;
 	assigned-clock-parents = <&cru CLK_GMAC_RGMII_M1>;
 	assigned-clocks = <&cru CLK_GMAC_ETHERNET_OUT>;
 	assigned-clock-rates = <25000000>;
+
 	tx_delay = <0x40>;
 	rx_delay = <0x3a>;
+
+	phy-handle = <&phy>;
 	status = "okay";
 };
 
@@ -374,6 +379,13 @@
 		     &i2s0m0_sdo1_sdi3>;
 };
 
+&mdio {
+	phy: phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c22";
+		reg = <0x0>;
+	};
+};
+
 &mpp_srv {
 	status = "okay";
 };