diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c index 7531cdc6f313..582fa1390d5c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c @@ -53,6 +53,36 @@ static bool iommu_reserve_map; static struct drm_driver rockchip_drm_driver; +static unsigned int drm_debug; +module_param_named(debug, drm_debug, int, 0600); + +static inline bool rockchip_drm_debug_enabled(enum rockchip_drm_debug_category category) +{ + return unlikely(drm_debug & category); +} + +__printf(3, 4) +void rockchip_drm_dbg(const struct device *dev, enum rockchip_drm_debug_category category, + const char *format, ...) +{ + struct va_format vaf; + va_list args; + + if (!rockchip_drm_debug_enabled(category)) + return; + + va_start(args, format); + vaf.fmt = format; + vaf.va = &args; + + if (dev) + dev_printk(KERN_DEBUG, dev, "%pV", &vaf); + else + printk(KERN_DEBUG "%pV", &vaf); + + va_end(args); +} + /** * rockchip_drm_wait_vact_end * @crtc: CRTC to enable line flag diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h index 434d3c93271b..f470d798e916 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.h @@ -64,6 +64,14 @@ struct iommu_domain; #define RK_IF_PROP_COLOR_DEPTH_CAPS "color_depth_caps" #define RK_IF_PROP_COLOR_FORMAT_CAPS "color_format_caps" +enum rockchip_drm_debug_category { + VOP_DEBUG_PLANE = BIT(0), + VOP_DEBUG_OVERLAY = BIT(1), + VOP_DEBUG_WB = BIT(2), + VOP_DEBUG_CFG_DONE = BIT(3), + VOP_DEBUG_VSYNC = BIT(7), +}; + enum rk_if_color_depth { RK_IF_DEPTH_8, RK_IF_DEPTH_10, @@ -490,6 +498,9 @@ int rockchip_drm_parse_cea_ext(struct rockchip_drm_dsc_cap *dsc_cap, const struct edid *edid); int rockchip_drm_parse_next_hdr(struct next_hdr_sink_data *sink_data, const struct edid *edid); +__printf(3, 4) +void rockchip_drm_dbg(const struct device *dev, enum rockchip_drm_debug_category category, + const char *format, ...); extern struct platform_driver cdn_dp_driver; extern struct platform_driver dw_hdmi_rockchip_pltfm_driver; diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 7ea5a356e16e..c61598e28dbe 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -1488,6 +1488,9 @@ static inline void rk3568_vop2_cfg_done(struct drm_crtc *crtc) * This is rather low probability for miss some done bit. */ val |= vop2_readl(vop2, RK3568_REG_CFG_DONE) & 0x7; + + rockchip_drm_dbg(vop2->dev, VOP_DEBUG_CFG_DONE, "cfg_done: 0x%x\n", val); + vop2_writel(vop2, 0, val); /** @@ -1513,6 +1516,8 @@ static inline void rk3588_vop2_cfg_done(struct drm_crtc *crtc) if (vcstate->splice_mode) val |= BIT(vp_data->splice_vp_id) | (BIT(vp_data->splice_vp_id) << 16); + rockchip_drm_dbg(vop2->dev, VOP_DEBUG_CFG_DONE, "cfg_done: 0x%x\n", val); + vop2_writel(vop2, 0, val); } @@ -3156,8 +3161,10 @@ static void vop2_wb_commit(struct drm_crtc *crtc) if (conn_state->writeback_job && conn_state->writeback_job->fb) { struct drm_framebuffer *fb = conn_state->writeback_job->fb; - DRM_DEV_DEBUG(vop2->dev, "Enable wb %ux%u fmt: %u pitches: %d addr: %pad\n", - fb->width, fb->height, wb_state->format, fb->pitches[0], &wb_state->yrgb_addr); + rockchip_drm_dbg(vop2->dev, VOP_DEBUG_WB, + "Enable wb %ux%u fmt: %u pitches: %d addr: %pad\n", + fb->width, fb->height, wb_state->format, + fb->pitches[0], &wb_state->yrgb_addr); drm_writeback_queue_job(wb_conn, conn_state); conn_state->writeback_job = NULL; @@ -4611,7 +4618,8 @@ static void vop2_plane_atomic_disable(struct drm_plane *plane, struct drm_plane_ struct vop2_plane_state *vpstate = to_vop2_plane_state(plane->state); #endif - DRM_DEV_DEBUG(vop2->dev, "%s disable\n", win->name); + rockchip_drm_dbg(vop2->dev, VOP_DEBUG_PLANE, "%s disable %s\n", + win->name, current->comm); if (!old_state->crtc) return; @@ -4896,11 +4904,12 @@ static void vop2_win_atomic_update(struct vop2_win *win, struct drm_rect *src, s vop2_win_enable(win); spin_lock(&vop2->reg_lock); - DRM_DEV_DEBUG(vop2->dev, "vp%d update %s[%dx%d->%dx%d@(%d, %d)] fmt[%.4s%s] addr[%pad]\n", - vp->id, win->name, actual_w, actual_h, dsp_w, dsp_h, - dsp_stx, dsp_sty, - drm_get_format_name(fb->format->format, &format_name), - modifier_to_string(fb->modifier), &vpstate->yrgb_mst); + rockchip_drm_dbg(vop2->dev, VOP_DEBUG_PLANE, + "vp%d update %s[%dx%d->%dx%d@(%d, %d)] fmt[%.4s%s] addr[%pad] by %s\n", + vp->id, win->name, actual_w, actual_h, dsp_w, dsp_h, + dsp_stx, dsp_sty, + drm_get_format_name(fb->format->format, &format_name), + modifier_to_string(fb->modifier), &vpstate->yrgb_mst, current->comm); if (vop2->version != VOP_VERSION_RK3568) rk3588_vop2_win_cfg_axi(win); @@ -8478,8 +8487,8 @@ static void vop2_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state vop2_zpos[nr_layers].zpos = vpstate->zpos; vop2_zpos[nr_layers].plane = plane; - DRM_DEV_DEBUG(vop2->dev, "%s active zpos:%d for vp%d from vp%d\n", - win->name, vpstate->zpos, vp->id, old_vp->id); + rockchip_drm_dbg(vop2->dev, VOP_DEBUG_OVERLAY, "%s active zpos:%d for vp%d from vp%d\n", + win->name, vpstate->zpos, vp->id, old_vp->id); /* left and right win may have different number */ if (vcstate->splice_mode) { splice_win = vop2_find_win_by_phys_id(vop2, win->splice_win_id); @@ -8512,8 +8521,8 @@ static void vop2_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state } vp->hdr10_at_splice_mode = hdr10_at_splice_mode; - DRM_DEV_DEBUG(vop2->dev, "vp%d: %d windows, active layers %d\n", - vp->id, hweight32(vp->win_mask), nr_layers); + rockchip_drm_dbg(vop2->dev, VOP_DEBUG_OVERLAY, "vp%d: %d windows, active layers %d\n", + vp->id, hweight32(vp->win_mask), nr_layers); if (nr_layers) { vp->nr_layers = nr_layers; @@ -9345,6 +9354,7 @@ static irqreturn_t vop2_isr(int irq, void *data) } if (active_irqs & FS_FIELD_INTR) { + rockchip_drm_dbg(vop2->dev, VOP_DEBUG_VSYNC, "vsync_vp%d\n", vp->id); vop2_wb_handler(vp); if (likely(!vp->skip_vsync) || (vp->layer_sel_update == false)) { drm_crtc_handle_vblank(crtc);