From 7449c71c4b2e17b653f55b74fa4043f7db5b276b Mon Sep 17 00:00:00 2001
From: Caesar Wang <wxt@rock-chips.com>
Date: Wed, 1 Nov 2017 19:42:19 +0800
Subject: [PATCH] ARM: dts: rockchip: add the gpu opp table for rk3036

This patch supported the gpu opp table for rk3036.
The gpu clock's parent is DPLL, the default frequency is 400MHz, we need
assign 400MHz for gpu to be better working.

There is a quickly way for testing the gpu scaling frequency.
As following:
"
unset FREQS
read -a FREQS < /sys/class/devfreq/10091000.gpu/available_frequencies

RANDOM=$$$(date +%s)
while true; do
  echo userspace > /sys/class/devfreq/10091000.gpu/governor
  FREQ=${FREQS[$RANDOM % ${#FREQS[@]} ]}
  echo GPU:Now ${FREQ}
  echo ${FREQ} > /sys/class/devfreq/10091000.gpu/userspace/set_freq
  sleep 1
done
"

Change-Id: Ia8eb3074e457014c497338a0a129551c51450104
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---
 arch/arm/boot/dts/rk3036.dtsi | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 123497945284..fcf84eaa2e75 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -162,13 +162,28 @@
 				  "pp0",
 				  "ppmmu0";
 		assigned-clocks = <&cru SCLK_GPU>;
-		assigned-clock-rates = <100000000>;
+		assigned-clock-rates = <400000000>;
+		assigned-clock-parents = <&cru PLL_DPLL>;
+		operating-points-v2 = <&gpu_opp_table>;
 		clocks = <&cru SCLK_GPU>, <&cru SCLK_GPU>;
 		clock-names = "bus", "core";
 		resets = <&cru SRST_GPU>;
 		status = "disabled";
 	};
 
+	gpu_opp_table: opp-table1 {
+		compatible = "operating-points-v2";
+
+		opp-200000000 {
+			opp-hz = /bits/ 64 <200000000>;
+			opp-microvolt = <1000000>;
+		};
+		opp-400000000 {
+			opp-hz = /bits/ 64 <400000000>;
+			opp-microvolt = <1100000>;
+		};
+	};
+
 	vpu: video-codec@10108000 {
 		compatible = "rockchip,rk3036-vpu", "rockchip,rk3288-vpu";
 		reg = <0x10108000 0x800>;