From 7592de62d7a8aa9fc047f5f2cd9558daa57e6296 Mon Sep 17 00:00:00 2001
From: Weiwen Chen <cww@rock-chips.com>
Date: Sat, 15 Aug 2020 17:06:42 +0800
Subject: [PATCH] ARM: dts: rv1126: 38x38 board: fix sdmmc level strength

Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Ia00e1f61b283cbd2c1727c5439fe9f392ec28a82
---
 .../arm/boot/dts/rv1126-38x38-v10-spi-nor.dts | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/rv1126-38x38-v10-spi-nor.dts b/arch/arm/boot/dts/rv1126-38x38-v10-spi-nor.dts
index 17e55db0f59b..8ab8b36b2288 100644
--- a/arch/arm/boot/dts/rv1126-38x38-v10-spi-nor.dts
+++ b/arch/arm/boot/dts/rv1126-38x38-v10-spi-nor.dts
@@ -328,6 +328,30 @@
 	>;
 };
 
+&sdmmc0_bus4 {
+	rockchip,pins =
+		/* sdmmc0_d0 */
+		<1 RK_PA4 1 &pcfg_pull_up_drv_level_0>,
+		/* sdmmc0_d1 */
+		<1 RK_PA5 1 &pcfg_pull_up_drv_level_0>,
+		/* sdmmc0_d2 */
+		<1 RK_PA6 1 &pcfg_pull_up_drv_level_0>,
+		/* sdmmc0_d3 */
+		<1 RK_PA7 1 &pcfg_pull_up_drv_level_0>;
+};
+
+&sdmmc0_clk {
+	rockchip,pins =
+		/* sdmmc0_clk */
+		<1 RK_PB0 1 &pcfg_pull_up_drv_level_3>;
+};
+
+&sdmmc0_cmd {
+	rockchip,pins =
+		/* sdmmc0_cmd */
+		<1 RK_PB1 1 &pcfg_pull_up_drv_level_0>;
+};
+
 &sdmmc {
 	bus-width = <4>;
 	cap-mmc-highspeed;