From 764ff0a4cb2ecf027990d96a30df9bcb78b85f72 Mon Sep 17 00:00:00 2001 From: Sandy Huang Date: Mon, 15 Jul 2024 15:26:51 +0800 Subject: [PATCH] drm/rockchip: vop2: get power_ctrl default value and backup to regsbak Read default register value and backup to regsbak must after pd power on, so we can get correctly value, but the pd power on action depend on regsbak, so we add extra regsbak for power_ctrl. Fixes: 6282856b6707 ("drm/rockchip: vop2: move power up plane pd before read regsbak") Signed-off-by: Sandy Huang Change-Id: I465b0ec76d4e1233c40e79528ee42b5c5c2fb727 --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 353fdd521f61..dfd6fcf9fa5b 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -4293,7 +4293,13 @@ static void vop2_initial(struct drm_crtc *crtc) */ if (vop2->version == VOP_VERSION_RK3588) { struct vop2_power_domain *esmart_pd = vop2_find_pd_by_id(vop2, VOP2_PD_ESMART); + u32 pd_offset = esmart_pd->data->regs->pd.offset; + /* + * Get power_ctrl default value and backup to regsbak, + * so we can config pd register correctly as expected. + */ + vop2->regsbak[pd_offset >> 2] = vop2_readl(vop2, pd_offset); if (vop2_power_domain_status(esmart_pd)) esmart_pd->on = true; else @@ -4302,10 +4308,14 @@ static void vop2_initial(struct drm_crtc *crtc) struct vop2_power_domain *pd, *n; list_for_each_entry_safe_reverse(pd, n, &vop2->pd_list_head, list) { - if (vop2_power_domain_status(pd)) + if (vop2_power_domain_status(pd)) { pd->on = true; - else + } else { + u32 pd_offset = pd->data->regs->pd.offset; + + vop2->regsbak[pd_offset >> 2] = vop2_readl(vop2, pd_offset); vop2_power_domain_on(pd); + } } }