From 776e2515695d501803cbe0fe772ece5b69778d9c Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Wed, 8 Nov 2023 12:02:18 +0800 Subject: [PATCH] clk: rockchip: rk3562: Fix clk_uart3_frac parent clk Signed-off-by: Finley Xiao Change-Id: Ief524953ddb3875ca1e99e63b99eca6193b7f3cc --- drivers/clk/rockchip/clk-rk3562.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3562.c b/drivers/clk/rockchip/clk-rk3562.c index cbf8ddb26406..e86f01486090 100644 --- a/drivers/clk/rockchip/clk-rk3562.c +++ b/drivers/clk/rockchip/clk-rk3562.c @@ -624,7 +624,7 @@ static struct rockchip_clk_branch rk3562_clk_branches[] __initdata = { COMPOSITE(CLK_UART3_SRC, "clk_uart3_src", gpll_cpll_p, 0, RK3562_PERI_CLKSEL_CON(25), 8, 1, MFLAGS, 0, 7, DFLAGS, RK3562_PERI_CLKGATE_CON(7), 15, GFLAGS), - COMPOSITE_FRACMUX(CLK_UART3_FRAC, "clk_uart3_frac", "clk_uart3", CLK_SET_RATE_PARENT, + COMPOSITE_FRACMUX(CLK_UART3_FRAC, "clk_uart3_frac", "clk_uart3_src", CLK_SET_RATE_PARENT, RK3562_PERI_CLKSEL_CON(26), 0, RK3562_PERI_CLKGATE_CON(8), 0, GFLAGS, &rk3562_clk_uart3_fracmux),