diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 2c250835ecf0..438ae0d567d9 100755 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1075,6 +1075,9 @@ interrupts = ; clocks = <&clk_gates13 4>, <&clk_gates7 4>; clock-names = "clk_usbphy0", "hclk_usb0"; + resets = <&reset RK3288_SOFT_RST_USBOTG_H>, <&reset RK3288_SOFT_RST_USBOTGPHY>, + <&reset RK3288_SOFT_RST_USBOTGC>; + reset-names = "otg_ahb", "otg_phy", "otg_controller"; /*0 - Normal, 1 - Force Host, 2 - Force Device*/ rockchip,usb-mode = <0>; }; @@ -1087,6 +1090,9 @@ <&usbphy_480m>; clock-names = "clk_usbphy1", "hclk_usb1", "usbphy_480m"; + resets = <&reset RK3288_SOFT_RST_USBHOST1_H>, <&reset RK3288_SOFT_RST_USBHOST1PHY>, + <&reset RK3288_SOFT_RST_USBHOST1C>; + reset-names = "host1_ahb", "host1_phy", "host1_controller"; }; usb2: usb@ff500000 { @@ -1095,6 +1101,9 @@ interrupts = ; clocks = <&clk_gates13 5>, <&clk_gates7 6>; clock-names = "clk_usbphy2", "hclk_usb2"; + resets = <&reset RK3288_SOFT_RST_USBHOST0_H>, <&reset RK3288_SOFT_RST_USBHOST0PHY>, + <&reset RK3288_SOFT_RST_USBHOST0C>, <&reset RK3288_SOFT_RST_USB_HOST0>; + reset-names = "ehci_ahb", "ehci_phy", "ehci_controller", "ehci"; }; usb3: usb@ff520000 { @@ -1115,6 +1124,9 @@ clock-names = "hsicphy_480m", "hclk_hsic", "hsicphy_12m", "usbphy_480m", "hsic_usbphy1", "hsic_usbphy2"; + resets = <&reset RK3288_SOFT_RST_HSIC>, <&reset RK3288_SOFT_RST_HSIC_AUX>, + <&reset RK3288_SOFT_RST_HSICPHY>; + reset-names = "hsic_ahb", "hsic_aux", "hsic_phy"; }; gmac: eth@ff290000 { diff --git a/arch/arm/mach-rockchip/ddr_freq.c b/arch/arm/mach-rockchip/ddr_freq.c index 2cf82297e646..1eac9dfc80c5 100644 --- a/arch/arm/mach-rockchip/ddr_freq.c +++ b/arch/arm/mach-rockchip/ddr_freq.c @@ -46,7 +46,6 @@ static DECLARE_COMPLETION(vop_req_completion); #endif static struct dvfs_node *clk_cpu_dvfs_node = NULL; -static int reboot_config_done = 0; static int ddr_boost = 0; static int print=0; static int watch=0; @@ -406,7 +405,6 @@ static noinline long ddrfreq_work(unsigned long sys_status) if (ddr.reboot_rate && (s & SYS_STATUS_REBOOT)) { ddrfreq_mode(false, ddr.reboot_rate, "shutdown/reboot"); rockchip_cpufreq_reboot_limit_freq(); - reboot_config_done = 1; return timeout; } @@ -548,7 +546,7 @@ static int ddrfreq_task(void *data) } wait_event_freezable_timeout(ddr.wait, vop_bandwidth_update_flag || (status != ddr.sys_status) || kthread_should_stop(), timeout); old_status = status; - } while (!kthread_should_stop() && !reboot_config_done); + } while (!kthread_should_stop()); return 0; } @@ -883,14 +881,8 @@ CLK_NOTIFIER(pd_vop1, LCDC1) static int ddrfreq_reboot_notifier_event(struct notifier_block *this, unsigned long event, void *ptr) { - u32 timeout = 1000; // 10s rockchip_set_system_status(SYS_STATUS_REBOOT); - while (!reboot_config_done && --timeout) { - msleep(10); - } - if (!timeout) { - pr_err("failed to set ddr clk from %luMHz to %luMHz when shutdown/reboot\n", dvfs_clk_get_rate(ddr.clk_dvfs_node) / MHZ, ddr.reboot_rate / MHZ); - } + return NOTIFY_OK; } diff --git a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c index 77c5c3cb4f4e..399ac942339b 100755 --- a/drivers/gpu/arm/midgard/mali_kbase_core_linux.c +++ b/drivers/gpu/arm/midgard/mali_kbase_core_linux.c @@ -85,7 +85,7 @@ EXPORT_SYMBOL(shared_kernel_test_data); #endif /* MALI_UNIT_TEST */ #define KBASE_DRV_NAME "mali" -#define ROCKCHIP_VERSION 4 +#define ROCKCHIP_VERSION 5 static const char kbase_drv_name[] = KBASE_DRV_NAME; static int kbase_dev_nr; diff --git a/drivers/gpu/arm/midgard/mali_kbase_softjobs.c b/drivers/gpu/arm/midgard/mali_kbase_softjobs.c index b52d23bc912a..82ee7c4139ee 100755 --- a/drivers/gpu/arm/midgard/mali_kbase_softjobs.c +++ b/drivers/gpu/arm/midgard/mali_kbase_softjobs.c @@ -256,24 +256,37 @@ static int kbase_fence_wait(kbase_jd_atom *katom) static void kbase_fence_cancel_wait(kbase_jd_atom *katom) { - if(!katom || !katom->fence) + if(!katom) { - pr_info("%s,katom or katom->fence NULL\n",__func__); + pr_err("katom null.forbiden return\n"); return; } + if(!katom->fence) + { + pr_info("katom->fence null.may release out of order.so continue unfinished step\n"); + /* + if return here,may result in infinite loop? + we need to delete dep_item[0] from kctx->waiting_soft_jobs? + jd_done_nolock function move the dep_item[0] to complete job list and then delete? + */ + goto finish_softjob; + } if (sync_fence_cancel_async(katom->fence, &katom->sync_waiter) != 0) { /* The wait wasn't cancelled - leave the cleanup for kbase_fence_wait_callback */ return; } - + /* Wait was cancelled - zap the atoms */ +finish_softjob: katom->event_code = BASE_JD_EVENT_JOB_CANCELLED; kbase_finish_soft_job(katom); if (jd_done_nolock(katom)) kbasep_js_try_schedule_head_ctx(katom->kctx->kbdev); + return; + } #endif /* CONFIG_SYNC */ diff --git a/drivers/hwmon/rockchip_tsadc.c b/drivers/hwmon/rockchip_tsadc.c index 18fc1d4d3de2..eb7002042490 100755 --- a/drivers/hwmon/rockchip_tsadc.c +++ b/drivers/hwmon/rockchip_tsadc.c @@ -468,9 +468,6 @@ int rockchip_hwmon_init(struct rockchip_temp *data) g_dev = rockchip_tsadc_data; data->plat_data = rockchip_tsadc_data; - ret = tsadc_readl(TSADC_AUTO_CON); - tsadc_writel(ret | (1 << 8) , TSADC_AUTO_CON);/*gpio0_b2 = 0 shutdown*/ - if (of_property_read_u32(np, "tsadc-ht-temp", &tsadc_ht_temp)) { dev_err(&data->pdev->dev, "Missing tsadc_ht_temp in the DT.\n"); @@ -487,15 +484,22 @@ int rockchip_hwmon_init(struct rockchip_temp *data) return -EPERM; } - uap = devm_kzalloc(&data->pdev->dev, sizeof(struct tsadc_port), - GFP_KERNEL); - if (uap == NULL) - dev_err(&data->pdev->dev, - "uap is not set %s,line=%d\n", __func__, __LINE__); - uap->pctl = devm_pinctrl_get(&data->pdev->dev); - uap->pins_default = pinctrl_lookup_state(uap->pctl, "default"); - uap->pins_tsadc_int = pinctrl_lookup_state(uap->pctl, "tsadc_int"); - pinctrl_select_state(uap->pctl, uap->pins_tsadc_int); + if (tsadc_ht_pull_gpio){ + /*bit8=1 gpio0_b2 = 1 shutdown else gpio0_b2 =1 shutdown*/ + /* + ret = tsadc_readl(TSADC_AUTO_CON); + tsadc_writel(ret | (1 << 8) , TSADC_AUTO_CON); + */ + uap = devm_kzalloc(&data->pdev->dev, sizeof(struct tsadc_port), + GFP_KERNEL); + if (uap == NULL) + dev_err(&data->pdev->dev, + "uap is not set %s,line=%d\n", __func__, __LINE__); + uap->pctl = devm_pinctrl_get(&data->pdev->dev); + uap->pins_default = pinctrl_lookup_state(uap->pctl, "default"); + uap->pins_tsadc_int = pinctrl_lookup_state(uap->pctl, "tsadc_int"); + pinctrl_select_state(uap->pctl, uap->pins_tsadc_int); + } rockchip_tsadc_set_auto_temp(1); diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c index 8e17e6111eb4..588ee69a931b 100755 --- a/drivers/mmc/host/dw_mmc-rockchip.c +++ b/drivers/mmc/host/dw_mmc-rockchip.c @@ -67,6 +67,18 @@ enum{ USE_CLK_AFTER_PHASE_AND_DELAY_LINE = 1, }; +enum{ + IO_DRV_2MA = 0x0, + IO_DRV_4MA = 0x1, + IO_DRV_8MA = 0x2, + IO_DRV_12MA = 0x3, +}; + +enum{ + SLEW_RATE_SLOW = 0, + SLEW_RATE_FAST = 1, +}; + /* Variations in Rockchip specific dw-mshc controller */ enum dw_mci_rockchip_type { DW_MCI_TYPE_RK3188, @@ -218,8 +230,44 @@ static inline u8 dw_mci_rockchip_move_next_clksmpl(struct dw_mci *host, u8 con_i return val; } +static void dw_mci_rockchip_load_signal_integrity(struct dw_mci *host, u32 sr, u32 drv) +{ + if (unlikely((drv > IO_DRV_12MA) || (sr > SLEW_RATE_FAST))) { + MMC_DBG_ERR_FUNC(host->mmc,"wrong signal integrity setting: drv = %d, sr = %d ![%s]", + drv, sr, mmc_hostname(host->mmc)); + return; + } + + if(cpu_is_rk3288()){ + /*Note 00: 2ma 01:4ma 10:8ma 11:12ma + For consider line loading and IP's slew rate, + we should match these by every board depends for signal integrity. + slew rate >= 2*pi*f*Vpeak = max(|d'(Vpeak)/dt|) + */ + if (host->mmc->restrict_caps & RESTRICT_CARD_TYPE_SDIO) { + grf_writel(0xff005500 | (drv << 14) | (drv << 12) | + (drv << 10) | (drv << 8), 0x01f8); /* GPIO4C4-C7 */ + grf_writel(0x000f0000 | (drv << 0) | (drv << 2), 0x01fc); /* GPIO4D0-D1 */ + grf_writel(0x03f00000 | (sr << 4) | (sr << 5) | (sr << 6) | + (sr << 7) | (sr << 8) | (sr << 9) , 0x011c); /* slew rate*/ + }else if (host->mmc->restrict_caps & RESTRICT_CARD_TYPE_SD) { + grf_writel(0x3fff0000 | (drv << 0) | (drv << 2) | (drv << 4) | + (drv << 6) | (drv << 8) | (drv << 10) | + (drv << 12), 0x0218); /* GPIO6C0-C6 */ + grf_writel(0x003f0000 | (sr << 0) | (sr << 1) | (sr << 2) | + (sr << 3) | (sr << 4) | (sr << 5), 0x012c); /* slew rate */ + }else if (host->mmc->restrict_caps & RESTRICT_CARD_TYPE_EMMC) { + /* emmc hardware relative addr match requirement, assume 4ma not slow slew rate */ + grf_writel(0xffff5555, 0x01e0); /* GPIO3A0-A7 */ + grf_writel(0x000c0006, 0x01e4); /* GPIO3B1 */ + grf_writel(0x003f0015, 0x01e8); /* GPIO3C2-C0 */ + } + } + +} static void dw_mci_rockchip_load_tuning_base(void) { + /* load tuning base */ if(cpu_is_rk3288()) cru_tuning_base = RK3288_CRU_SDMMC_CON0; @@ -279,6 +327,7 @@ static int dw_mci_rockchip_execute_tuning(struct dw_mci_slot *slot, u32 opcode, u8 step; u8 candidates_delayline[MAX_DELAY_LINE] = {0}; u8 candidates_degree[SDMMC_SHIFT_DEGREE_INVALID] = {4,4,4,4}; + u8 default_drv = IO_DRV_4MA; u8 index = 0; u8 start_degree = 0; u32 start_delayline = 0; @@ -291,7 +340,7 @@ static int dw_mci_rockchip_execute_tuning(struct dw_mci_slot *slot, u32 opcode, MMC_DBG_INFO_FUNC(host->mmc,"execute tuning: [%s]", mmc_hostname(host->mmc)); dw_mci_rockchip_load_tuning_base(); - + blk_test = kmalloc(blksz, GFP_KERNEL); if (!blk_test) { @@ -335,7 +384,10 @@ static int dw_mci_rockchip_execute_tuning(struct dw_mci_slot *slot, u32 opcode, "execute tuning: SOC is UNKNOWN, step = %d[%s]", step, mmc_hostname(host->mmc)); } - + +re_phase: + /* calcute slew rate & drv strength in timing tuning */ + dw_mci_rockchip_load_signal_integrity(host, SLEW_RATE_SLOW, default_drv); /* Loop degree from 0 ~ 270 */ for(start_degree = SDMMC_SHIFT_DEGREE_0; start_degree < SDMMC_SHIFT_DEGREE_270; start_degree++){ @@ -433,8 +485,8 @@ static int dw_mci_rockchip_execute_tuning(struct dw_mci_slot *slot, u32 opcode, #else dw_mci_rockchip_set_delaynum(host, tuning_data->con_id, tuning_data->tuning_type, step); ret = 0; - goto done; - #endif + goto done; + #endif }else if((candidates_degree[0] == SDMMC_SHIFT_DEGREE_180) && (candidates_degree[1] == SDMMC_SHIFT_DEGREE_INVALID)){ @@ -444,11 +496,13 @@ static int dw_mci_rockchip_execute_tuning(struct dw_mci_slot *slot, u32 opcode, dw_mci_rockchip_set_degree(host, tuning_data->con_id, tuning_data->tuning_type, SDMMC_SHIFT_DEGREE_90); #if PRECISE_ADJUST - goto delayline; + goto delayline; #else - dw_mci_rockchip_set_delaynum(host, tuning_data->con_id, tuning_data->tuning_type, step); - ret = 0; - goto done; + default_drv++; + goto re_phase; + //dw_mci_rockchip_set_delaynum(host, tuning_data->con_id, tuning_data->tuning_type, step); + //ret = 0; + //goto done; #endif }else if((candidates_degree[0] == SDMMC_SHIFT_DEGREE_90) && (candidates_degree[1] == SDMMC_SHIFT_DEGREE_INVALID)){ @@ -461,9 +515,11 @@ static int dw_mci_rockchip_execute_tuning(struct dw_mci_slot *slot, u32 opcode, #if PRECISE_ADJUST goto delayline; #else - dw_mci_rockchip_set_delaynum(host, tuning_data->con_id, tuning_data->tuning_type, step); - ret = 0; - goto done; + default_drv++; + goto re_phase; + //dw_mci_rockchip_set_delaynum(host, tuning_data->con_id, tuning_data->tuning_type, step); + //ret = 0; + //goto done; #endif }else if((candidates_degree[0] == SDMMC_SHIFT_DEGREE_270)){ @@ -473,18 +529,22 @@ static int dw_mci_rockchip_execute_tuning(struct dw_mci_slot *slot, u32 opcode, /*FixME: so urgly signal indicator, HW engineer help!*/ - dw_mci_rockchip_set_degree(host, tuning_data->con_id, tuning_data->tuning_type, SDMMC_SHIFT_DEGREE_180); + //dw_mci_rockchip_set_degree(host, tuning_data->con_id, tuning_data->tuning_type, SDMMC_SHIFT_DEGREE_180); #if PRECISE_ADJUST goto delayline; #else - dw_mci_rockchip_set_delaynum(host, tuning_data->con_id, tuning_data->tuning_type, step); - ret = 0; - goto done; + default_drv++; + goto re_phase; + //dw_mci_rockchip_set_delaynum(host, tuning_data->con_id, tuning_data->tuning_type, step); + //ret = 0; + //goto done; #endif }else{ MMC_DBG_ERR_FUNC(host->mmc, "execute tuning: candidates_degree beyong limited case! [%s]", mmc_hostname(host->mmc)); + default_drv++; + goto re_phase; if(host->mmc->restrict_caps & RESTRICT_CARD_TYPE_EMMC) BUG(); return -EAGAIN; @@ -505,8 +565,11 @@ delayline: } } if((index < 2) && (index != 0)) { + /* setup 400ps, consider line loading, at least 600ps wc. + for 150M, 15 steps =900ps ,too larger scale, should step smaller in principle + */ MMC_DBG_INFO_FUNC(host->mmc, - "execute tuning: candidates_delayline failed for only one element [%s]", + "execute tuning: candidates_delayline failed for no enough elements [%s]", mmc_hostname(host->mmc)); /* Make step smaller, and re-calculate */ diff --git a/drivers/mmc/host/rk_sdmmc.c b/drivers/mmc/host/rk_sdmmc.c index 1bba0bfd8377..fb05e86b30bb 100755 --- a/drivers/mmc/host/rk_sdmmc.c +++ b/drivers/mmc/host/rk_sdmmc.c @@ -49,9 +49,7 @@ #include #include "../../clk/rockchip/clk-ops.h" -#define grf_writel(v, offset) do { writel_relaxed(v, RK_GRF_VIRT + offset); dsb(); } while (0) - -#define RK_SDMMC_DRIVER_VERSION "Ver 1.11 2014-06-05" +#define RK_SDMMC_DRIVER_VERSION "Ver 1.12 2014-07-08" /* Common flag combinations */ #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | \ diff --git a/drivers/usb/dwc_otg_310/dwc_otg_driver.c b/drivers/usb/dwc_otg_310/dwc_otg_driver.c index 5b9ceb1f94d9..9a60c23f9b71 100755 --- a/drivers/usb/dwc_otg_310/dwc_otg_driver.c +++ b/drivers/usb/dwc_otg_310/dwc_otg_driver.c @@ -1041,7 +1041,7 @@ static int host20_driver_probe(struct platform_device *_dev) pldata->phy_suspend(pldata, USB_PHY_ENABLED); if (pldata->soft_reset) - pldata->soft_reset(); + pldata->soft_reset(pldata, RST_POR); res_base = platform_get_resource(_dev, IORESOURCE_MEM, 0); diff --git a/drivers/usb/dwc_otg_310/dwc_otg_hcd_linux.c b/drivers/usb/dwc_otg_310/dwc_otg_hcd_linux.c index 7da1cd71e0d6..42c3dc1349d7 100755 --- a/drivers/usb/dwc_otg_310/dwc_otg_hcd_linux.c +++ b/drivers/usb/dwc_otg_310/dwc_otg_hcd_linux.c @@ -376,7 +376,7 @@ static void dwc_otg_hcd_enable(struct work_struct *work) _core_if->hcd_cb->disconnect(_core_if->hcd_cb->p); } #endif - pldata->soft_reset(); + pldata->soft_reset(pldata, RST_RECNT); dwc_otg_disable_host_interrupts(core_if); if (pldata->phy_suspend) pldata->phy_suspend(pldata, USB_PHY_SUSPEND); diff --git a/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c b/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c index def6e719d969..6a733ddf0117 100755 --- a/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c +++ b/drivers/usb/dwc_otg_310/dwc_otg_pcd_linux.c @@ -1479,7 +1479,7 @@ static void dwc_phy_reconnect(struct work_struct *work) if (gctrl.b.bsesvld) { pcd->conn_status++; - pldata->soft_reset(); + pldata->soft_reset(pldata, RST_RECNT); dwc_pcd_reset(pcd); /* * Enable the global interrupt after all the interrupt diff --git a/drivers/usb/dwc_otg_310/usbdev_rk.h b/drivers/usb/dwc_otg_310/usbdev_rk.h index 8f4389e10a85..c6d9e76d2694 100755 --- a/drivers/usb/dwc_otg_310/usbdev_rk.h +++ b/drivers/usb/dwc_otg_310/usbdev_rk.h @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -44,6 +45,13 @@ #define UOC_HIWORD_UPDATE(val, mask, shift) \ ((val) << (shift) | (mask) << ((shift) + 16)) +enum rkusb_rst_flag { + RST_POR = 0, /* Reset power-on */ + RST_RECNT, /* Reset re-connect */ + RST_CHN_HALT, /* Reset a channel halt has been detected */ + RST_OTHER, +}; + extern int rk_usb_charger_status; extern void rk_send_wakeup_key(void); /* rk3188 platform data */ @@ -68,16 +76,15 @@ struct dwc_otg_platform_data { struct clk *busclk; struct clk *phyclk_480m; int phy_status; - - void (*hw_init)(void); - void (*phy_suspend)(void *pdata, int suspend); - void (*soft_reset)(void); - void (*clock_init)(void *pdata); - void (*clock_enable)(void *pdata, int enable); - void (*power_enable)(int enable); - void (*dwc_otg_uart_mode)(void *pdata, int enter_usb_uart_mode); - void (*bc_detect_cb)(int bc_type); - int (*get_status)(int id); + void (*hw_init) (void); + void (*phy_suspend) (void *pdata, int suspend); + void (*soft_reset) (void *pdata, enum rkusb_rst_flag rst_type); + void (*clock_init) (void *pdata); + void (*clock_enable) (void *pdata, int enable); + void (*power_enable) (int enable); + void (*dwc_otg_uart_mode) (void *pdata, int enter_usb_uart_mode); + void (*bc_detect_cb) (int bc_type); + int (*get_status) (int id); }; struct rkehci_platform_data { @@ -87,13 +94,12 @@ struct rkehci_platform_data { struct clk *hsic_phy_12m; struct clk *phyclk; struct clk *ahbclk; - - void (*hw_init)(void); - void (*clock_init)(void *pdata); - void (*clock_enable)(void *pdata, int enable); - void (*phy_suspend)(void *pdata, int suspend); - void (*soft_reset)(void); - int (*get_status)(int id); + void (*hw_init) (void); + void (*clock_init) (void *pdata); + void (*clock_enable) (void *pdata, int enable); + void (*phy_suspend) (void *pdata, int suspend); + void (*soft_reset) (void *pdata, enum rkusb_rst_flag rst_type); + int (*get_status) (int id); int clk_status; int phy_status; }; diff --git a/drivers/usb/dwc_otg_310/usbdev_rk30.c b/drivers/usb/dwc_otg_310/usbdev_rk30.c index 0f3c134c9e55..dcdfb7d38e24 100755 --- a/drivers/usb/dwc_otg_310/usbdev_rk30.c +++ b/drivers/usb/dwc_otg_310/usbdev_rk30.c @@ -43,7 +43,7 @@ static void usb20otg_phy_suspend(void *pdata, int suspend) } } -static void usb20otg_soft_reset(void) +static void usb20otg_soft_reset(void *pdata, enum rkusb_rst_flag rst_type) { } @@ -192,7 +192,7 @@ static void usb20host_phy_suspend(void *pdata, int suspend) } } -static void usb20host_soft_reset(void) +static void usb20host_soft_reset(void *pdata, enum rkusb_rst_flag rst_type) { } @@ -368,7 +368,7 @@ static void rk_hsic_clock_enable(void *pdata, int enable) } } -static void rk_hsic_soft_reset(void) +static void rk_hsic_soft_reset(void *pdata, enum rkusb_rst_flag rst_type) { } diff --git a/drivers/usb/dwc_otg_310/usbdev_rk32.c b/drivers/usb/dwc_otg_310/usbdev_rk32.c index d1a9406fe3f9..97675201256b 100755 --- a/drivers/usb/dwc_otg_310/usbdev_rk32.c +++ b/drivers/usb/dwc_otg_310/usbdev_rk32.c @@ -43,16 +43,26 @@ static void usb20otg_phy_suspend(void *pdata, int suspend) } } -static void usb20otg_soft_reset(void) +static void usb20otg_soft_reset(void *pdata, enum rkusb_rst_flag rst_type) { - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, true); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, true); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, true); - udelay(5); + struct dwc_otg_platform_data *usbpdata = pdata; + struct reset_control *rst_otg_h, *rst_otg_p, *rst_otg_c; - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTG_H, false); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGPHY, false); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBOTGC, false); + rst_otg_h = devm_reset_control_get(usbpdata->dev, "otg_ahb"); + rst_otg_p = devm_reset_control_get(usbpdata->dev, "otg_phy"); + rst_otg_c = devm_reset_control_get(usbpdata->dev, "otg_controller"); + if (IS_ERR(rst_otg_h) || IS_ERR(rst_otg_p) || IS_ERR(rst_otg_c)) { + dev_err(usbpdata->dev, "Fail to get reset control from dts\n"); + return; + } + + reset_control_assert(rst_otg_h); + reset_control_assert(rst_otg_p); + reset_control_assert(rst_otg_c); + udelay(5); + reset_control_deassert(rst_otg_h); + reset_control_deassert(rst_otg_p); + reset_control_deassert(rst_otg_c); mdelay(2); } @@ -206,16 +216,26 @@ static void usb20host_phy_suspend(void *pdata, int suspend) } } -static void usb20host_soft_reset(void) +static void usb20host_soft_reset(void *pdata, enum rkusb_rst_flag rst_type) { - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, true); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, true); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, true); - udelay(5); + struct dwc_otg_platform_data *usbpdata = pdata; + struct reset_control *rst_host1_h, *rst_host1_p, *rst_host1_c; - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1_H, false); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1PHY, false); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST1C, false); + rst_host1_h = devm_reset_control_get(usbpdata->dev, "host1_ahb"); + rst_host1_p = devm_reset_control_get(usbpdata->dev, "host1_phy"); + rst_host1_c = devm_reset_control_get(usbpdata->dev, "host1_controller"); + if (IS_ERR(rst_host1_h) || IS_ERR(rst_host1_p) || IS_ERR(rst_host1_c)) { + dev_err(usbpdata->dev, "Fail to get reset control from dts\n"); + return; + } + + reset_control_assert(rst_host1_h); + reset_control_assert(rst_host1_p); + reset_control_assert(rst_host1_c); + udelay(5); + reset_control_deassert(rst_host1_h); + reset_control_deassert(rst_host1_p); + reset_control_deassert(rst_host1_c); mdelay(2); } @@ -392,16 +412,22 @@ static void rk_hsic_clock_enable(void *pdata, int enable) } } -static void rk_hsic_soft_reset(void) +static void rk_hsic_soft_reset(void *pdata, enum rkusb_rst_flag rst_type) { - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, true); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, true); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, true); - udelay(5); + struct rkehci_platform_data *usbpdata = pdata; + struct reset_control *rst_hsic_h, rst_hsic_a, rst_hsic_p; - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC, false); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSIC_AUX, false); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_HSICPHY, false); + rst_hsic_h = devm_reset_control_get(usbpdata->dev, "hsic_ahb"); + rst_hsic_a = devm_reset_control_get(usbpdata->dev, "hsic_aux"); + rst_hsic_p = devm_reset_control_get(usbpdata->dev, "hsic_phy"); + + reset_control_assert(rst_hsic_h); + reset_control_assert(rst_hsic_a); + reset_control_assert(rst_hsic_p); + udelay(5); + reset_control_deassert(rst_hsic_h); + reset_control_deassert(rst_hsic_a); + reset_control_deassert(rst_hsic_p); mdelay(2); /* HSIC per-port reset */ @@ -491,18 +517,31 @@ static void rk_ehci_clock_enable(void *pdata, int enable) } } -static void rk_ehci_soft_reset(void) +static void rk_ehci_soft_reset(void *pdata, enum rkusb_rst_flag rst_type) { - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, true); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, true); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, true); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, true); - udelay(5); + struct rkehci_platform_data *usbpdata = pdata; + struct reset_control *rst_host0_h, *rst_host0_p, + *rst_host0_c , *rst_host0; - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0_H, false); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0PHY, false); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USBHOST0C, false); - rk3288_cru_set_soft_reset(RK3288_SOFT_RST_USB_HOST0, false); + rst_host0_h = devm_reset_control_get(usbpdata->dev, "ehci_ahb"); + rst_host0_p = devm_reset_control_get(usbpdata->dev, "ehci_phy"); + rst_host0_c = devm_reset_control_get(usbpdata->dev, "ehci_controller"); + rst_host0 = devm_reset_control_get(usbpdata->dev, "ehci"); + if (IS_ERR(rst_host0_h) || IS_ERR(rst_host0_p) || + IS_ERR(rst_host0_c) || IS_ERR(rst_host0)) { + dev_err(usbpdata->dev, "Fail to get reset control from dts\n"); + return; + } + + reset_control_assert(rst_host0_h); + reset_control_assert(rst_host0_p); + reset_control_assert(rst_host0_c); + reset_control_assert(rst_host0); + udelay(5); + reset_control_deassert(rst_host0_h); + reset_control_deassert(rst_host0_p); + reset_control_deassert(rst_host0_c); + reset_control_deassert(rst_host0); mdelay(2); } @@ -595,7 +634,7 @@ static void rk_ohci_clock_enable(void *pdata, int enable) } } -static void rk_ohci_soft_reset(void) +static void rk_ohci_soft_reset(void *pdata, enum rkusb_rst_flag rst_type) { } @@ -725,34 +764,29 @@ static int otg_irq_detect_init(struct platform_device *pdev) /*register otg_bvalid irq */ irq = platform_get_irq_byname(pdev, "otg_bvalid"); - if (irq > 0) { - ret = - request_irq(irq, bvalid_irq_handler, 0, "otg_bvalid", NULL); + if ((irq > 0) && control_usb->usb_irq_wakeup) { + ret = request_irq(irq, bvalid_irq_handler, + 0, "otg_bvalid", NULL); if (ret < 0) { dev_err(&pdev->dev, "request_irq %d failed!\n", irq); - return ret; } else { /* enable bvalid irq */ control_usb->grf_uoc0_base->CON4 = 0x000c000c; - if (control_usb->usb_irq_wakeup) - enable_irq_wake(irq); } } /*register otg_id irq */ irq = platform_get_irq_byname(pdev, "otg_id"); - if (irq > 0) { + if ((irq > 0) && control_usb->usb_irq_wakeup) { ret = request_irq(irq, id_irq_handler, 0, "otg_id", NULL); if (ret < 0) { dev_err(&pdev->dev, "request_irq %d failed!\n", irq); - return ret; } else { + /* enable otg_id irq */ control_usb->grf_uoc0_base->CON4 = 0x00f000f0; - if (control_usb->usb_irq_wakeup) - enable_irq_wake(irq); } } -#ifdef USB_LINESTATE_IRQ +#if 0 /*register otg_linestate irq */ irq = platform_get_irq_byname(pdev, "otg_linestate"); if (irq > 0) { diff --git a/drivers/usb/host/ehci-rkhsic.c b/drivers/usb/host/ehci-rkhsic.c index 72495a8c8291..659bcf0fd414 100755 --- a/drivers/usb/host/ehci-rkhsic.c +++ b/drivers/usb/host/ehci-rkhsic.c @@ -142,7 +142,7 @@ static ssize_t ehci_rkhsic_power_store(struct device *_dev, usb_remove_hcd(hcd); break; case 1: /* power on */ - pldata->soft_reset(); + pldata->soft_reset(pldata, RST_POR); usb_add_hcd(hcd, hcd->irq, IRQF_DISABLED | IRQF_SHARED); ehci_rkhsic_port_power(ehci, 1); @@ -275,7 +275,7 @@ static int ehci_rkhsic_probe(struct platform_device *pdev) } if (pldata->soft_reset) - pldata->soft_reset(); + pldata->soft_reset(pldata, RST_POR);; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { diff --git a/drivers/usb/host/ehci-rockchip.c b/drivers/usb/host/ehci-rockchip.c index 74fd0b786d53..03217cd22e7e 100755 --- a/drivers/usb/host/ehci-rockchip.c +++ b/drivers/usb/host/ehci-rockchip.c @@ -97,7 +97,7 @@ static void rk_ehci_hcd_enable(struct work_struct *work) usb_remove_hcd(hcd); /* reset cru and reinitialize EHCI controller */ - pldata->soft_reset(); + pldata->soft_reset(pldata, RST_RECNT); usb_add_hcd(hcd, hcd->irq, IRQF_DISABLED | IRQF_SHARED); if (pldata->phy_suspend) pldata->phy_suspend(pldata, USB_PHY_SUSPEND); @@ -228,7 +228,7 @@ static ssize_t ehci_power_store(struct device *_dev, usb_remove_hcd(hcd); break; case 1: /* power on */ - pldata->soft_reset(); + pldata->soft_reset(pldata, RST_POR); usb_add_hcd(hcd, hcd->irq, IRQF_DISABLED | IRQF_SHARED); ehci_port_power(ehci, 1); break; @@ -357,7 +357,7 @@ static int ehci_rk_probe(struct platform_device *pdev) pldata->phy_suspend(pldata, USB_PHY_ENABLED); if (pldata->soft_reset) - pldata->soft_reset(); + pldata->soft_reset(pldata, RST_POR);; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { diff --git a/include/linux/mmc/rk_mmc.h b/include/linux/mmc/rk_mmc.h index a54c31dab5d0..8c088b80dba2 100755 --- a/include/linux/mmc/rk_mmc.h +++ b/include/linux/mmc/rk_mmc.h @@ -292,5 +292,8 @@ struct dw_mci_board { struct dma_pdata *data; struct block_settings *blk_settings; }; +#define grf_writel(v, offset) do \ + { writel_relaxed(v, RK_GRF_VIRT + offset); dsb(); } \ + while (0) #endif /* LINUX_MMC_DW_MMC_H */ diff --git a/sound/soc/codecs/rk616_codec.c b/sound/soc/codecs/rk616_codec.c index cd812be5a8ac..75fe6e606bef 100755 --- a/sound/soc/codecs/rk616_codec.c +++ b/sound/soc/codecs/rk616_codec.c @@ -3243,14 +3243,11 @@ void rk616_platform_shutdown(struct platform_device *pdev) mdelay(10); snd_soc_write(codec, RK616_RESET, 0x3); - if (rk616) { - kfree(rk616); - printk("rk616 = %d, rk616_priv = %d\n", rk616, rk616_priv); + if (rk616_priv) { + kfree(rk616_priv); if (rk616_priv) rk616_priv = NULL; - rk616_codec_power_up(RK616_CODEC_PLAYBACK); } - } static struct platform_driver rk616_codec_driver = {