From 7a6e007af7c8f711fd6d89888f4d728d9c8ed0aa Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Sat, 13 Nov 2021 11:57:47 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588: Enable gic its rk3588 has two its: - its0: pcie2x1l0, pcie2x1l1, pcie2x1l2 - its1: pcie3x4, pcie3x2 Signed-off-by: Kever Yang Change-Id: Ie0dc4a79bdd8708c4be06b3175d48b7a9a927f6d --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 6 +++--- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 +++++++++--- 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index bb7f0026efd7..1de0e7fa7dc2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -438,7 +438,7 @@ num-ib-windows = <16>; num-ob-windows = <16>; max-link-speed = <3>; - msi-map = <0x0000 &its 0x0000 0x1000>; + msi-map = <0x0000 &its1 0x0000 0x1000>; num-lanes = <4>; phys = <&pcie30phy>; phy-names = "pcie-phy"; @@ -489,7 +489,7 @@ num-ib-windows = <16>; num-ob-windows = <16>; max-link-speed = <3>; - msi-map = <0x1000 &its 0x1000 0x1000>; + msi-map = <0x1000 &its1 0x1000 0x1000>; num-lanes = <2>; phys = <&pcie30phy>; phy-names = "pcie-phy"; @@ -540,7 +540,7 @@ num-ib-windows = <8>; num-ob-windows = <8>; max-link-speed = <2>; - msi-map = <0x2000 &its 0x2000 0x1000>; + msi-map = <0x2000 &its0 0x2000 0x1000>; num-lanes = <1>; phys = <&combphy1_ps PHY_TYPE_PCIE>; phy-names = "pcie-phy"; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 6810a0998710..ed7854fc9e10 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -2658,7 +2658,7 @@ num-ib-windows = <8>; num-ob-windows = <8>; max-link-speed = <2>; - msi-map = <0x3000 &its 0x3000 0x1000>; + msi-map = <0x3000 &its0 0x3000 0x1000>; num-lanes = <1>; phys = <&combphy2_psu PHY_TYPE_PCIE>; phy-names = "pcie-phy"; @@ -2709,7 +2709,7 @@ num-ib-windows = <8>; num-ob-windows = <8>; max-link-speed = <2>; - msi-map = <0x4000 &its 0x4000 0x1000>; + msi-map = <0x4000 &its0 0x4000 0x1000>; num-lanes = <1>; phys = <&combphy0_ps PHY_TYPE_PCIE>; phy-names = "pcie-phy"; @@ -3099,12 +3099,18 @@ reg = <0x0 0xfe600000 0 0x10000>, /* GICD */ <0x0 0xfe680000 0 0x100000>; /* GICR */ interrupts = ; - its: interrupt-controller@fe640000 { + its0: msi-controller@fe640000 { compatible = "arm,gic-v3-its"; msi-controller; #msi-cells = <1>; reg = <0x0 0xfe640000 0x0 0x20000>; }; + its1: msi-controller@fe660000 { + compatible = "arm,gic-v3-its"; + msi-controller; + #msi-cells = <1>; + reg = <0x0 0xfe660000 0x0 0x20000>; + }; }; dmac0: dma-controller@fea10000 {