From 7abaac5a040a93d175d649897e1c8f7b196a1a3b Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Sun, 25 Jun 2023 15:42:08 +0800 Subject: [PATCH] PCIe: dw: rockchip: Disabled BAR0 and BAR1 fix the following case: [ 2.143145] pci 0000:00:00.0: BAR 0: no space for [mem size 0x40000000] [ 2.143155] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x40000000] [ 2.143161] pci 0000:00:00.0: BAR 1: no space for [mem size 0x40000000] [ 2.143168] pci 0000:00:00.0: BAR 1: failed to assign [mem size 0x40000000] Change-Id: I5eca2adb49d83c775036df7e961dab5c9fbfffbb Signed-off-by: Jon Lin --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index 153de6772691..c18be20a512e 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -1145,6 +1145,10 @@ static int rk_add_pcie_port(struct rk_pcie *rk_pcie, struct platform_device *pde return ret; } + /* Disable BAR0 BAR1 */ + dw_pcie_writel_dbi(pci, PCIE_TYPE0_HDR_DBI2_OFFSET + 0x10 + BAR_0 * 4, 0); + dw_pcie_writel_dbi(pci, PCIE_TYPE0_HDR_DBI2_OFFSET + 0x10 + BAR_1 * 4, 0); + return 0; }