From 7ac00fb94ed24464e7be2525009b7b7f5e46b1be Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Mon, 5 Feb 2018 15:55:19 +0800 Subject: [PATCH] arm: dts: add dmc support for rk322x Change-Id: Ibf72cb8d2e26490386212d564309f5b85692105a Signed-off-by: Liang Chen --- arch/arm/boot/dts/rk322x.dtsi | 51 +++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 7ac359209bf9..45d1a52c1115 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -9,6 +9,8 @@ #include #include #include +#include +#include "rk322x-dram-default-timing.dtsi" / { #address-cells = <1>; @@ -129,6 +131,55 @@ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; }; + dmc: dmc { + compatible = "rockchip,rk3228-dmc", "rockchip,rk322x-dram"; + clocks = <&cru SCLK_DDRC>; + clock-names = "dmc_clk"; + operating-points-v2 = <&dmc_opp_table>; + system-status-freq = < + /*system status freq(KHz)*/ + SYS_STATUS_NORMAL 600000 + SYS_STATUS_VIDEO_4K 666000 + SYS_STATUS_VIDEO_4K_10B 786000 + >; + dram_freq = <786000000>; + rockchip,dram_timing = <&dram_timing>; + status = "disabled"; + }; + + dmc_opp_table: dmc-opp-table { + compatible = "operating-points-v2"; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <1050000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1050000>; + }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1050000>; + }; + opp-666000000 { + opp-hz = /bits/ 64 <666000000>; + opp-microvolt = <1100000>; + }; + opp-700000000 { + opp-hz = /bits/ 64 <700000000>; + opp-microvolt = <1100000>; + }; + opp-786000000 { + opp-hz = /bits/ 64 <786000000>; + opp-microvolt = <1150000>; + }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1150000>; + }; + }; + psci { compatible = "arm,psci-1.0", "arm,psci-0.2"; method = "smc";