From 7afc0c7b4bb60ec50231a54ba31b4a24ef2cb2f4 Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Thu, 5 Jul 2018 15:38:16 +0800 Subject: [PATCH] ASoC: rk3308_codec: put switch BIST early during enable ADCs Fix the negative data before enabling loopback. Change-Id: I8f4ef1e83b38f17c80f9b4109984c6560e570d20 Signed-off-by: Xing Zheng --- sound/soc/codecs/rk3308_codec.c | 61 ++++++++++++++++----------------- 1 file changed, 29 insertions(+), 32 deletions(-) diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c index 77897f00196e..b7e68360624b 100644 --- a/sound/soc/codecs/rk3308_codec.c +++ b/sound/soc/codecs/rk3308_codec.c @@ -975,30 +975,6 @@ static int rk3308_mute_stream(struct snd_soc_dai *dai, int mute, int stream) #endif } else { #if !DEBUG_POP_ALWAYS - if (has_loopback(rk3308->loopback_grp) && - (rk3308->dac_output == DAC_LINEOUT)) { - int type = ADC_TYPE_LOOPBACK; - int idx, grp; - - /* - * Switch to dummy BIST mode (BIST keep reset - * now) to keep the zero input data in I2S bus. - * - * It may cause the glitch if we hold the ADC - * digtital i2s module in codec. - */ - for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) { - regmap_update_bits(rk3308->regmap, - RK3308_ADC_DIG_CON03(grp), - RK3308_ADC_L_CH_BIST_MSK, - RK3308_ADC_L_CH_BIST_SINE); - regmap_update_bits(rk3308->regmap, - RK3308_ADC_DIG_CON03(grp), - RK3308_ADC_R_CH_BIST_MSK, - RK3308_ADC_R_CH_BIST_SINE); - } - } - if (rk3308->dac_output == DAC_LINEOUT) rk3308_speaker_ctl(rk3308, 1); else if (rk3308->dac_output == DAC_HPOUT) @@ -2535,14 +2511,35 @@ static int rk3308_codec_open_capture(struct rk3308_codec_priv *rk3308) RK3308_ADC_R_CH_NORMAL_LEFT); } else { for (idx = 0; adc_for_each_grp(rk3308, type, idx, &grp); idx++) { - regmap_update_bits(rk3308->regmap, - RK3308_ADC_DIG_CON03(grp), - RK3308_ADC_L_CH_BIST_MSK, - RK3308_ADC_L_CH_NORMAL_LEFT); - regmap_update_bits(rk3308->regmap, - RK3308_ADC_DIG_CON03(grp), - RK3308_ADC_R_CH_BIST_MSK, - RK3308_ADC_R_CH_NORMAL_RIGHT); + if (has_loopback(rk3308->loopback_grp) && + grp == ADC_GRP_SKIP_MAGIC) { + /* + * Switch to dummy BIST mode (BIST keep reset + * now) to keep the zero input data in I2S bus. + * + * It may cause the glitch if we hold the ADC + * digtital i2s module in codec. + * + * Then, the grp which is set from loopback_grp. + */ + regmap_update_bits(rk3308->regmap, + RK3308_ADC_DIG_CON03(rk3308->loopback_grp), + RK3308_ADC_L_CH_BIST_MSK, + RK3308_ADC_L_CH_BIST_SINE); + regmap_update_bits(rk3308->regmap, + RK3308_ADC_DIG_CON03(rk3308->loopback_grp), + RK3308_ADC_R_CH_BIST_MSK, + RK3308_ADC_R_CH_BIST_SINE); + } else { + regmap_update_bits(rk3308->regmap, + RK3308_ADC_DIG_CON03(grp), + RK3308_ADC_L_CH_BIST_MSK, + RK3308_ADC_L_CH_NORMAL_LEFT); + regmap_update_bits(rk3308->regmap, + RK3308_ADC_DIG_CON03(grp), + RK3308_ADC_R_CH_BIST_MSK, + RK3308_ADC_R_CH_NORMAL_RIGHT); + } } }