From 7b025e71f8208a4c02898c250b2470314e535f2d Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Mon, 18 Jul 2022 15:06:51 +0800 Subject: [PATCH] arm64: dts: rockchip: px30: update opp-table for cpu/gpu Change-Id: I18c23712810b1ef3f8305b616a988bf7f7ba4f1a Signed-off-by: Liang Chen --- arch/arm64/boot/dts/rockchip/px30.dtsi | 151 ++++++++++++++++++++++++- 1 file changed, 150 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index b22c74368422..e1e8887d41b1 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -120,30 +120,121 @@ compatible = "operating-points-v2"; opp-shared; + rockchip,temp-hysteresis = <5000>; + rockchip,low-temp = <0>; + rockchip,low-temp-min-volt = <1000000>; + rockchip,low-temp-adjust-volt = < + /* MHz MHz uV */ + 0 1512 50000 + >; + + clocks = <&cru PLL_APLL>; + rockchip,avs-scale = <4>; + rockchip,max-volt = <1350000>; + rockchip,evb-irdrop = <25000>; + nvmem-cells = <&cpu_leakage>, <&performance>; + nvmem-cell-names = "cpu_leakage", "performance"; + rockchip,bin-scaling-sel = < + 0 13 + 1 15 + >; + + rockchip,pvtm-voltage-sel = < + 0 50000 0 + 50001 54000 1 + 54001 60000 2 + 60001 99999 3 + >; + rockchip,pvtm-freq = <408000>; + rockchip,pvtm-volt = <1000000>; + rockchip,pvtm-ch = <0 0>; + rockchip,pvtm-sample-time = <1000>; + rockchip,pvtm-number = <10>; + rockchip,pvtm-error = <1000>; + rockchip,pvtm-ref-temp = <40>; + rockchip,pvtm-temp-prop = <(-56) (-56)>; + rockchip,thermal-zone = "soc-thermal"; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <950000 950000 1350000>; + opp-microvolt-L0 = <950000 950000 1350000>; + opp-microvolt-L1 = <950000 950000 1350000>; + opp-microvolt-L2 = <950000 950000 1350000>; + opp-microvolt-L3 = <950000 950000 1350000>; + clock-latency-ns = <40000>; + opp-suspend; + }; opp-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <950000 950000 1350000>; + opp-microvolt-L0 = <950000 950000 1350000>; + opp-microvolt-L1 = <950000 950000 1350000>; + opp-microvolt-L2 = <950000 950000 1350000>; + opp-microvolt-L3 = <950000 950000 1350000>; clock-latency-ns = <40000>; - opp-suspend; }; opp-816000000 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <1050000 1050000 1350000>; + opp-microvolt-L0 = <1050000 1050000 1350000>; + opp-microvolt-L1 = <1000000 1000000 1350000>; + opp-microvolt-L2 = <1000000 1000000 1350000>; + opp-microvolt-L3 = <950000 950000 1350000>; clock-latency-ns = <40000>; }; opp-1008000000 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <1175000 1175000 1350000>; + opp-microvolt-L0 = <1175000 1175000 1350000>; + opp-microvolt-L1 = <1125000 1125000 1350000>; + opp-microvolt-L2 = <1125000 1125000 1350000>; + opp-microvolt-L3 = <1050000 1050000 1350000>; clock-latency-ns = <40000>; }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; opp-microvolt = <1300000 1300000 1350000>; + opp-microvolt-L0 = <1300000 1300000 1350000>; + opp-microvolt-L1 = <1275000 1275000 1350000>; + opp-microvolt-L2 = <1250000 1250000 1350000>; + opp-microvolt-L3 = <1200000 1200000 1350000>; + clock-latency-ns = <40000>; + }; + opp-1248000000 { + opp-hz = /bits/ 64 <1248000000>; + opp-microvolt = <1350000 1350000 1350000>; + opp-microvolt-L0 = <1350000 1350000 1350000>; + opp-microvolt-L1 = <1300000 1300000 1350000>; + opp-microvolt-L2 = <1275000 1275000 1350000>; + opp-microvolt-L3 = <1225000 1225000 1350000>; clock-latency-ns = <40000>; }; opp-1296000000 { opp-hz = /bits/ 64 <1296000000>; opp-microvolt = <1350000 1350000 1350000>; + opp-microvolt-L0 = <1350000 1350000 1350000>; + opp-microvolt-L1 = <1350000 1350000 1350000>; + opp-microvolt-L2 = <1300000 1300000 1350000>; + opp-microvolt-L3 = <1250000 1250000 1350000>; + clock-latency-ns = <40000>; + }; + opp-1416000000 { + opp-hz = /bits/ 64 <1416000000>; + opp-microvolt = <1350000 1350000 1350000>; + opp-microvolt-L0 = <1350000 1350000 1350000>; + opp-microvolt-L1 = <1350000 1350000 1350000>; + opp-microvolt-L2 = <1300000 1300000 1350000>; + opp-microvolt-L3 = <1250000 1250000 1350000>; + clock-latency-ns = <40000>; + }; + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <1350000 1350000 1350000>; + opp-microvolt-L0 = <1350000 1350000 1350000>; + opp-microvolt-L1 = <1350000 1350000 1350000>; + opp-microvolt-L2 = <1300000 1300000 1350000>; + opp-microvolt-L3 = <1250000 1250000 1350000>; clock-latency-ns = <40000>; }; }; @@ -1113,9 +1204,67 @@ clocks = <&cru SCLK_GPU>; #cooling-cells = <2>; power-domains = <&power PX30_PD_GPU>; + operating-points-v2 = <&gpu_opp_table>; status = "disabled"; }; + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + rockchip,thermal-zone = "soc-thermal"; + rockchip,temp-hysteresis = <5000>; + rockchip,low-temp = <0>; + rockchip,low-temp-min-volt = <1000000>; + rockchip,low-temp-adjust-volt = < + /* MHz MHz uV */ + 0 480 50000 + >; + + rockchip,max-volt = <1175000>; + rockchip,evb-irdrop = <25000>; + + rockchip,pvtm-voltage-sel = < + 0 50000 0 + 50001 54000 1 + 54001 60000 2 + 60001 99999 3 + >; + rockchip,pvtm-ch = <0 0>; + + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-microvolt = <950000>; + opp-microvolt-L0 = <950000>; + opp-microvolt-L1 = <950000>; + opp-microvolt-L2 = <950000>; + opp-microvolt-L3 = <950000>; + }; + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + opp-microvolt = <975000>; + opp-microvolt-L0 = <975000>; + opp-microvolt-L1 = <950000>; + opp-microvolt-L2 = <950000>; + opp-microvolt-L3 = <950000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1050000>; + opp-microvolt-L0 = <1050000>; + opp-microvolt-L1 = <1025000>; + opp-microvolt-L2 = <975000>; + opp-microvolt-L3 = <950000>; + }; + opp-480000000 { + opp-hz = /bits/ 64 <480000000>; + opp-microvolt = <1125000>; + opp-microvolt-L0 = <1125000>; + opp-microvolt-L1 = <1100000>; + opp-microvolt-L2 = <1050000>; + opp-microvolt-L3 = <1000000>; + }; + }; + mpp_srv: mpp-srv { compatible = "rockchip,mpp-service"; rockchip,taskqueue-count = <1>;