From 7b61d4b92dbcdf0b644ef5b5a358a932e6df035e Mon Sep 17 00:00:00 2001 From: Jianqun Xu Date: Fri, 5 Feb 2021 16:47:07 +0800 Subject: [PATCH] iommu/rockchip: fix error define for v2 iommu Correct mapping is like following: page table desc bit phys address bit [ 7:4] [39:36] [11:8] [35:32] Fixes: a4318b7d2910 ("iommu: rockchip: Add support iommu v2") Change-Id: I2ebbd2ec37111f44960a7ba0e5b90a9102448e23 Signed-off-by: Simon Xue Signed-off-by: Jianqun Xu --- drivers/iommu/rockchip-iommu.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index a18e6d9da845..c90a7cebc081 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -91,16 +91,16 @@ #define PAGE_DESC_LO_MASK 0xfffff000 #define PAGE_DESC_HI1_LOWER 32 -#define PAGE_DESC_HI1_UPPER 34 -#define PAGE_DESC_HI2_LOWER 35 +#define PAGE_DESC_HI1_UPPER 35 +#define PAGE_DESC_HI2_LOWER 36 #define PAGE_DESC_HI2_UPPER 39 #define PAGE_DESC_HI_MASK1 GENMASK_ULL(PAGE_DESC_HI1_UPPER, PAGE_DESC_HI1_LOWER) #define PAGE_DESC_HI_MASK2 GENMASK_ULL(PAGE_DESC_HI2_UPPER, PAGE_DESC_HI2_LOWER) -#define DTE_HI1_LOWER 9 +#define DTE_HI1_LOWER 8 #define DTE_HI1_UPPER 11 #define DTE_HI2_LOWER 4 -#define DTE_HI2_UPPER 8 +#define DTE_HI2_UPPER 7 #define DTE_HI_MASK1 GENMASK(DTE_HI1_UPPER, DTE_HI1_LOWER) #define DTE_HI_MASK2 GENMASK(DTE_HI2_UPPER, DTE_HI2_LOWER) @@ -212,8 +212,8 @@ static struct rk_iommu_domain *to_rk_domain(struct iommu_domain *dom) /* * In v2: * 31:12 - PT address bit 31:0 - * 11: 9 - PT address bit 34:32 - * 8: 4 - PT address bit 39:35 + * 11: 8 - PT address bit 35:32 + * 7: 4 - PT address bit 39:36 * 3: 1 - Reserved * 0 - 1 if PT @ PT address is valid */ @@ -226,13 +226,13 @@ static inline phys_addr_t rk_dte_pt_address(u32 dte) static inline phys_addr_t rk_dte_pt_address_v2(u32 dte) { - phys_addr_t dte_v2 = dte; + u64 dte_v2 = dte; dte_v2 = ((dte_v2 & DTE_HI_MASK2) << PAGE_DESC_HI_SHIFT2) | ((dte_v2 & DTE_HI_MASK1) << PAGE_DESC_HI_SHIFT1) | (dte_v2 & PAGE_DESC_LO_MASK); - return dte_v2; + return (phys_addr_t)dte_v2; } static inline bool rk_dte_is_pt_valid(u32 dte) @@ -302,13 +302,13 @@ static inline phys_addr_t rk_pte_page_address(u32 pte) static inline phys_addr_t rk_pte_page_address_v2(u32 pte) { - phys_addr_t pte_v2 = pte; + u64 pte_v2 = pte; pte_v2 = ((pte_v2 & DTE_HI_MASK2) << PAGE_DESC_HI_SHIFT2) | ((pte_v2 & DTE_HI_MASK1) << PAGE_DESC_HI_SHIFT1) | (pte_v2 & PAGE_DESC_LO_MASK); - return pte_v2; + return (phys_addr_t)pte_v2; } static inline bool rk_pte_is_page_valid(u32 pte)