From 7b957a4593616a82dc0d96f49839b341745f0aad Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Tue, 28 Feb 2023 11:02:53 +0800 Subject: [PATCH] clk: rockchip: rk3562: Make 100m 200m and 300m src as critical clk The ATF may use these clocks. Signed-off-by: Finley Xiao Change-Id: Ie31f6b368aa467a989cd534c1795bb781ddd9998 --- drivers/clk/rockchip/clk-rk3562.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3562.c b/drivers/clk/rockchip/clk-rk3562.c index 820de0a76045..4a32b95bb878 100644 --- a/drivers/clk/rockchip/clk-rk3562.c +++ b/drivers/clk/rockchip/clk-rk3562.c @@ -213,16 +213,16 @@ static struct rockchip_clk_branch rk3562_clk_branches[] __initdata = { COMPOSITE(CLK_MATRIX_50M_SRC, "clk_matrix_50m_src", gpll_cpll_p, 0, RK3562_CLKSEL_CON(0), 7, 1, MFLAGS, 0, 5, DFLAGS, RK3562_CLKGATE_CON(0), 0, GFLAGS), - COMPOSITE(CLK_MATRIX_100M_SRC, "clk_matrix_100m_src", gpll_cpll_p, 0, + COMPOSITE(CLK_MATRIX_100M_SRC, "clk_matrix_100m_src", gpll_cpll_p, CLK_IS_CRITICAL, RK3562_CLKSEL_CON(0), 15, 1, MFLAGS, 8, 4, DFLAGS, RK3562_CLKGATE_CON(0), 1, GFLAGS), COMPOSITE(CLK_MATRIX_125M_SRC, "clk_matrix_125m_src", gpll_cpll_p, 0, RK3562_CLKSEL_CON(1), 7, 1, MFLAGS, 0, 4, DFLAGS, RK3562_CLKGATE_CON(0), 2, GFLAGS), - COMPOSITE(CLK_MATRIX_200M_SRC, "clk_matrix_200m_src", gpll_cpll_p, 0, + COMPOSITE(CLK_MATRIX_200M_SRC, "clk_matrix_200m_src", gpll_cpll_p, CLK_IS_CRITICAL, RK3562_CLKSEL_CON(2), 7, 1, MFLAGS, 0, 4, DFLAGS, RK3562_CLKGATE_CON(0), 4, GFLAGS), - COMPOSITE(CLK_MATRIX_300M_SRC, "clk_matrix_300m_src", gpll_cpll_p, 0, + COMPOSITE(CLK_MATRIX_300M_SRC, "clk_matrix_300m_src", gpll_cpll_p, CLK_IS_CRITICAL, RK3562_CLKSEL_CON(3), 7, 1, MFLAGS, 0, 4, DFLAGS, RK3562_CLKGATE_CON(0), 6, GFLAGS), COMPOSITE(ACLK_TOP, "aclk_top", gpll_cpll_p, CLK_IS_CRITICAL,