arm64: dts: rockchip: px30: update rockchip-iommu clk name

Change-Id: I45b9fd681064b57efafe92d2a90486af1a77d293
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This commit is contained in:
Sandy Huang
2019-08-22 10:34:27 +08:00
parent 83fda806f0
commit 7c932a6cd6

View File

@@ -1413,7 +1413,7 @@
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "hevc_mmu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "hclk";
clock-names = "aclk", "iface";
power-domains = <&power PX30_PD_VPU>;
#iommu-cells = <0>;
};
@@ -1424,7 +1424,7 @@
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "hclk";
clock-names = "aclk", "iface";
power-domains = <&power PX30_PD_VPU>;
#iommu-cells = <0>;
};
@@ -1507,7 +1507,7 @@
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopb_mmu";
clocks = <&cru ACLK_VOPB>, <&cru HCLK_VOPB>;
clock-names = "aclk", "hclk";
clock-names = "aclk", "iface";
power-domains = <&power PX30_PD_VO>;
#iommu-cells = <0>;
status = "disabled";
@@ -1553,7 +1553,7 @@
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vopl_mmu";
clocks = <&cru ACLK_VOPL>, <&cru HCLK_VOPL>;
clock-names = "aclk", "hclk";
clock-names = "aclk", "iface";
power-domains = <&power PX30_PD_VO>;
#iommu-cells = <0>;
status = "disabled";
@@ -1605,7 +1605,7 @@
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vip_mmu";
clocks = <&cru ACLK_CIF>, <&cru HCLK_CIF>;
clock-names = "aclk", "hclk";
clock-names = "aclk", "iface";
power-domains = <&power PX30_PD_VI>;
rk_iommu,disable_reset_quirk;
#iommu-cells = <0>;
@@ -1661,7 +1661,7 @@
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "isp_mmu";
clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
clock-names = "aclk", "hclk";
clock-names = "aclk", "iface";
power-domains = <&power PX30_PD_VI>;
rk_iommu,disable_reset_quirk;
#iommu-cells = <0>;