diff --git a/arch/arm64/boot/dts/amlogic/meson64_odroidn2.dts b/arch/arm64/boot/dts/amlogic/meson64_odroidn2.dts
index 7f606591b30a..8fdd3a756213 100644
--- a/arch/arm64/boot/dts/amlogic/meson64_odroidn2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson64_odroidn2.dts
@@ -524,9 +524,9 @@
 			 SPI0_CLK(GPIOX.11->23 Pin)
 			 SPI_CE0(GPIOX.2->22 Pin), SPI_CE1(GPIOX.10->24 Pin)
 	*/
-	pinctrl-names = "default";
+	pinctrl-names = "default","gpio_periphs";
 	pinctrl-0 = <&spicc0_pins_x>;
-
+	pinctrl-1 = <&spicc0_to_gpiox>;
 	num_chipselect = <2>;
 
 	cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>,
diff --git a/arch/arm64/boot/dts/amlogic/mesong12_odroid_common.dtsi b/arch/arm64/boot/dts/amlogic/mesong12_odroid_common.dtsi
index 3b79244e29b9..818a6ee24716 100644
--- a/arch/arm64/boot/dts/amlogic/mesong12_odroid_common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/mesong12_odroid_common.dtsi
@@ -506,4 +506,13 @@
 			function = "gpio_periphs";
 		};
 	};
+	spicc0_to_gpiox: spicc0_gpiox {
+		mux {
+			groups = "GPIOX_8",
+				 "GPIOX_9",
+				 //"GPIOX_10",
+				 "GPIOX_11";
+			function = "gpio_periphs";
+		};
+	};
 }; /* end of pinctrl_periphs */
diff --git a/drivers/spi/spi-meson-spicc.c b/drivers/spi/spi-meson-spicc.c
index ea3528414962..b60f7d7f8b59 100644
--- a/drivers/spi/spi-meson-spicc.c
+++ b/drivers/spi/spi-meson-spicc.c
@@ -23,6 +23,9 @@
 #include <linux/reset.h>
 #include <linux/gpio.h>
 #include <linux/dma-mapping.h>
+#if defined(CONFIG_ARCH_MESON64_ODROID_COMMON)
+#include <linux/pinctrl/consumer.h>
+#endif
 
 /*
  * The Meson SPICC controller could support DMA based transfers, but is not
@@ -214,6 +217,9 @@ struct meson_spicc_device {
 	unsigned long			rxb_remain;
 	unsigned long			xfer_remain;
 	bool				using_dma;
+#if defined(CONFIG_ARCH_MESON64_ODROID_COMMON)
+	struct pinctrl			*pinctrl;
+#endif
 #ifdef MESON_SPICC_TEST_ENTRY
 	struct				class cls;
 	u8				test_data;
@@ -1041,6 +1047,9 @@ static int meson_spicc_probe(struct platform_device *pdev)
 	spicc = spi_master_get_devdata(master);
 	spicc->master = master;
 
+#if defined(CONFIG_ARCH_MESON64_ODROID_COMMON)
+	spicc->pinctrl = NULL;
+#endif
 	spicc->pdev = pdev;
 	platform_set_drvdata(pdev, spicc);
 
@@ -1076,6 +1085,14 @@ static int meson_spicc_probe(struct platform_device *pdev)
 		goto out_master;
 	}
 
+#if defined(CONFIG_ARCH_MESON64_ODROID_COMMON)
+	spicc->pinctrl = devm_pinctrl_get_select(&pdev->dev, "default");
+	if (IS_ERR(spicc->pinctrl)) {
+		spicc->pinctrl = NULL;
+		dev_err(&pdev->dev, "spi pinmux : can't get spicc_pins\n");
+	}
+#endif
+
 	device_reset_optional(&pdev->dev);
 
 	master->num_chipselect = 4;
@@ -1112,6 +1129,18 @@ static int meson_spicc_remove(struct platform_device *pdev)
 {
 	struct meson_spicc_device *spicc = platform_get_drvdata(pdev);
 
+#ifdef MESON_SPICC_TEST_ENTRY
+	class_unregister(&spicc->cls);
+#endif /* end MESON_SPICC_TEST_ENTRY */
+
+#if defined(CONFIG_ARCH_MESON64_ODROID_COMMON)
+	if (spicc->pinctrl)
+		devm_pinctrl_put(spicc->pinctrl);
+
+	spicc->pinctrl = devm_pinctrl_get_select(&pdev->dev, "gpio_periphs");
+	devm_pinctrl_put(spicc->pinctrl);
+	spicc->pinctrl = NULL;
+#endif
 	/* Disable SPI */
 	writel(0, spicc->base + SPICC_CONREG);