From 7d87c9ffe3721d653a0433721deaf768e95a25fe Mon Sep 17 00:00:00 2001 From: "ruixuan.li" Date: Thu, 21 Mar 2019 00:21:10 +0800 Subject: [PATCH] sm1: emmc run hs200 busmode [1/1] PD#SWPL-5404 Problem: emmc report data crc error in hs200 busmode Solution: set hs200 co_phase to 2 and did not reset the hs200 co_phase and tx_phase when adjust tuning is find the error point in sm1 Verify: verify pass on sm1_s905d3_ac200 Change-Id: I56aa8eb666fb55641db75878a3488f66c721bd6d Signed-off-by: ruixuan.li Conflicts: arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts arch/arm64/boot/dts/amlogic/sm1_s905d3_skt.dts drivers/amlogic/mmc/aml_sd_emmc.c --- drivers/amlogic/mmc/aml_sd_emmc.c | 3 ++- drivers/amlogic/mmc/aml_sd_emmc_v3.c | 6 ++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/amlogic/mmc/aml_sd_emmc.c b/drivers/amlogic/mmc/aml_sd_emmc.c index 883fffb63702..db8e04c6b11a 100644 --- a/drivers/amlogic/mmc/aml_sd_emmc.c +++ b/drivers/amlogic/mmc/aml_sd_emmc.c @@ -3647,13 +3647,14 @@ static struct meson_mmc_data mmc_data_sm1 = { .sdmmc.hs.core_phase = 3, .sdmmc.ddr.core_phase = 2, .sdmmc.ddr.tx_phase = 0, - .sdmmc.hs2.core_phase = 3, + .sdmmc.hs2.core_phase = 2, .sdmmc.hs2.tx_phase = 0, .sdmmc.hs4.tx_delay = 0, .sdmmc.sd_hs.core_phase = 3, .sdmmc.sdr104.core_phase = 2, .sdmmc.sdr104.tx_phase = 0, }; + static const struct of_device_id meson_mmc_of_match[] = { { .compatible = "amlogic, meson-mmc-gxbb", diff --git a/drivers/amlogic/mmc/aml_sd_emmc_v3.c b/drivers/amlogic/mmc/aml_sd_emmc_v3.c index eb9ac1e213f1..63d3def84dd4 100644 --- a/drivers/amlogic/mmc/aml_sd_emmc_v3.c +++ b/drivers/amlogic/mmc/aml_sd_emmc_v3.c @@ -1600,8 +1600,10 @@ tunning: nmatch = aml_sd_emmc_tuning_transfer(mmc, opcode, blk_pattern, host->blk_test, blksz); if (nmatch != TUNING_NUM_PER_POINT) { - clkc->core_phase = para->hs2.tx_phase; - clkc->tx_phase = para->hs2.core_phase; + if (host->data->chip_type != MMC_CHIP_SM1) { + clkc->core_phase = para->hs2.tx_phase; + clkc->tx_phase = para->hs2.core_phase; + } writel(vclk, host->base + SD_EMMC_CLOCK_V3); pr_info("%s:try clock:0x%x>>>rx_tuning[%d] = %d\n", mmc_hostname(host->mmc),