From 7db276831b2501ea7b6cf8857380b009dca21dca Mon Sep 17 00:00:00 2001 From: Yu Qiaowei Date: Thu, 24 Mar 2022 17:59:32 +0800 Subject: [PATCH] video: rockchip: rga3: Fix OSD configuration 1. Fixup fix_width will only be less than 128(0x3f). 2. Add support RGBA2BPP. Signed-off-by: Yu Qiaowei Change-Id: I8af80a6ca6e26a0b1e2f023427108739fdf27dfa --- drivers/video/rockchip/rga3/include/rga2_reg_info.h | 4 ++-- drivers/video/rockchip/rga3/rga2_reg_info.c | 10 ++++++++++ drivers/video/rockchip/rga3/rga_common.c | 4 ++++ 3 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/video/rockchip/rga3/include/rga2_reg_info.h b/drivers/video/rockchip/rga3/include/rga2_reg_info.h index 55618faeeb0d..dd9d4d7bbb94 100644 --- a/drivers/video/rockchip/rga3/include/rga2_reg_info.h +++ b/drivers/video/rockchip/rga3/include/rga2_reg_info.h @@ -165,8 +165,8 @@ #define s_RGA2_OSD_CTRL0_SW_OSD_VER_MODE(x) ((x & 0x1) << 2) #define s_RGA2_OSD_CTRL0_SW_OSD_WIDTH_MODE(x) ((x & 0x1) << 3) #define s_RGA2_OSD_CTRL0_SW_OSD_BLK_NUM(x) ((x & 0x1f) << 4) -#define s_RGA2_OSD_CTRL0_SW_OSD_FLAGS_INDEX(x) ((x & 0x3f) << 10) -#define s_RGA2_OSD_CTRL0_SW_OSD_FIX_WIDTH(x) ((x & 0x3f) << 20) +#define s_RGA2_OSD_CTRL0_SW_OSD_FLAGS_INDEX(x) ((x & 0x3ff) << 10) +#define s_RGA2_OSD_CTRL0_SW_OSD_FIX_WIDTH(x) ((x & 0x3ff) << 20) #define s_RGA2_OSD_CTRL0_SW_OSD_2BPP_MODE(x) ((x & 0x1) << 30) /* RGA2_OSD_CTRL1 */ diff --git a/drivers/video/rockchip/rga3/rga2_reg_info.c b/drivers/video/rockchip/rga3/rga2_reg_info.c index 89467aa929cb..361a925a6229 100644 --- a/drivers/video/rockchip/rga3/rga2_reg_info.c +++ b/drivers/video/rockchip/rga3/rga2_reg_info.c @@ -1450,6 +1450,9 @@ static void RGA2_set_reg_osd(u8 *base, struct rga2_req *msg) /* The register is '0' as the first. */ block_num = msg->osd_info.mode_ctrl.block_num - 1; + if (msg->src1.format == RGA_FORMAT_RGBA_2BPP) + rgba2bpp_en = 1; + reg = 0; reg = ((reg & (~m_RGA2_OSD_CTRL0_SW_OSD_MODE)) | (s_RGA2_OSD_CTRL0_SW_OSD_MODE(msg->osd_info.mode_ctrl.mode))); @@ -1986,6 +1989,13 @@ static void rga_cmd_to_rga2_cmd(struct rga_scheduler_t *scheduler, default: break; } + + if (req->osd_info.enable) { + /* set dst(osd_block) real color mode */ + if (req->alpha_mode_0 & (0x01 << 9)) + req->alpha_mode_0 |= (1 << 15); + } + /* Real color mode */ if ((req_rga->alpha_rop_flag >> 9) & 1) { if (req->alpha_mode_0 & (0x01 << 1)) diff --git a/drivers/video/rockchip/rga3/rga_common.c b/drivers/video/rockchip/rga3/rga_common.c index 8c9fb0788c7d..b87c9937106b 100644 --- a/drivers/video/rockchip/rga3/rga_common.c +++ b/drivers/video/rockchip/rga3/rga_common.c @@ -338,6 +338,10 @@ const char *rga_get_format_name(uint32_t format) return "ABGR5551"; case RGA_FORMAT_ABGR_4444: return "ABGR4444"; + + case RGA_FORMAT_RGBA_2BPP: + return "RGBA2BPP"; + default: return "UNF"; }