From 80bc7372a89dbeee1d99ceabdada4d29cd282f80 Mon Sep 17 00:00:00 2001 From: Lan Honglin Date: Wed, 27 Dec 2023 11:51:56 +0800 Subject: [PATCH] media: i2c: os04d10: add reg list of 1440p@30fps and 360p@120fps Change-Id: Ifda327acddd93f993c9ce0508ec6b02a9c997cf2 Signed-off-by: Lan Honglin --- drivers/media/i2c/os04d10.c | 332 ++++++++++++++++++++++++++++++++++++ 1 file changed, 332 insertions(+) diff --git a/drivers/media/i2c/os04d10.c b/drivers/media/i2c/os04d10.c index 1ebdea7eae00..24e34034bc6e 100644 --- a/drivers/media/i2c/os04d10.c +++ b/drivers/media/i2c/os04d10.c @@ -171,6 +171,308 @@ static const struct regval os04d10_global_regs[] = { {REG_NULL, 0x00}, }; +/* + * Xclk 24Mhz + * max_framerate 120fps + * mipi_datarate per lane 720Mbps, 2lane + * 4X4 binning to 640X360 + */ +static const struct regval os04d10_linear_10_640x360_regs[] = { + {0xfd, 0x00}, + {0x20, 0x00}, + {0x20, 0x01}, + {0x20, 0x01}, + {0x20, 0x01}, + {0x20, 0x01}, + {0x41, 0xa8}, + {0x45, 0x24}, + {0x30, 0x02}, + {0x31, 0x24}, + {0x35, 0xc9}, + {0x38, 0x15}, + {0xfd, 0x01}, + {0x03, 0x00}, + {0x04, 0x04}, + {0x06, 0x01}, + {0x24, 0xff}, + {0x31, 0x26}, + {0x02, 0x01}, + {0x42, 0x5a}, + {0x47, 0x0c}, + {0x45, 0x02}, + {0x48, 0x0c}, + {0x4b, 0x88}, + {0xd4, 0x05}, + {0xd5, 0xd2}, + {0xd7, 0x05}, + {0xd8, 0xd2}, + {0x50, 0x01}, + {0x51, 0x11}, + {0x52, 0x18}, + {0x53, 0x01}, + {0x54, 0x01}, + {0x55, 0x01}, + {0x57, 0x08}, + {0x5c, 0x40}, + {0x7c, 0x06}, + {0x7d, 0x05}, + {0x7e, 0x05}, + {0x7f, 0x05}, + {0x90, 0x60}, + {0x91, 0x0f}, + {0x92, 0x35}, + {0x93, 0x36}, + {0x94, 0x0f}, + {0x95, 0x7e}, + {0x98, 0x5d}, + {0xa8, 0x50}, + {0xaa, 0x14}, + {0xab, 0x05}, + {0xac, 0x14}, + {0xad, 0x05}, + {0xae, 0x4a}, + {0xaf, 0x0e}, + {0xb2, 0x07}, + {0xb3, 0x0c}, + {0xc9, 0x28}, + {0xca, 0x5e}, + {0xcb, 0x5e}, + {0xcc, 0x5e}, + {0xcd, 0x5e}, + {0xce, 0x5c}, + {0xcf, 0x5c}, + {0xd0, 0x5c}, + {0xd1, 0x5c}, + {0xd2, 0x7c}, + {0xd3, 0x7c}, + {0xdb, 0x0f}, + {0xfd, 0x01}, + {0x46, 0x77}, + {0xdd, 0x00}, + {0xde, 0x3f}, + {0xfd, 0x03}, + {0x2b, 0x0a}, + {0x01, 0x22}, + {0x02, 0x03}, + {0x00, 0x06}, + {0x2a, 0x22}, + {0x29, 0x0b}, + {0x1e, 0x10}, + {0x1f, 0x02}, + {0x1a, 0x24}, + {0x1b, 0x62}, + {0x1c, 0xce}, + {0x1d, 0xd3}, + {0x04, 0x0f}, + {0x36, 0x00}, + {0x37, 0x05}, + {0x38, 0x09}, + {0x39, 0x19}, + {0x3a, 0x38}, + {0x3b, 0x22}, + {0x3c, 0x22}, + {0x3d, 0x22}, + {0x3e, 0x03}, + {0xfd, 0x02}, + {0xc1, 0x05}, + {0x8c, 0x03}, + {0x8d, 0x01}, + {0x95, 0x02}, + {0x98, 0x02}, + {0x5e, 0x22}, + {0xa1, 0x00}, + {0xa2, 0x01}, + {0xa3, 0x68}, + {0xa5, 0x02}, + {0xa6, 0x02}, + {0xa7, 0x80}, + {0x8e, 0x02}, + {0x8f, 0x80}, + {0x90, 0x01}, + {0x91, 0x68}, + {0xce, 0x65}, + {0xfd, 0x03}, + {0x03, 0x30}, + {0x05, 0x00}, + {0x12, 0x70}, + {0x13, 0x70}, + {0x16, 0x13}, + {0x21, 0xca}, + {0x27, 0x95}, + {0x2c, 0x55}, + {0x2d, 0x08}, + {0x2e, 0xca}, + {0x3f, 0xe7}, + {0xfd, 0x00}, + {0x8b, 0x01}, + {0x8d, 0x00}, + {0xfd, 0x01}, + {0x01, 0x02}, + {0xfd, 0x05}, + {0xc4, 0x62}, + {0xc5, 0x62}, + {0xc6, 0x62}, + {0xc7, 0x62}, + {0xce, 0x3e}, + {0xf0, 0x40}, + {0xf1, 0x40}, + {0xf2, 0x40}, + {0xf3, 0x40}, + {0xf4, 0x00}, + {0xf9, 0x03}, + {0xfa, 0x5d}, + {0xfb, 0x6b}, + {0xb1, 0x01}, + {REG_NULL, 0x00}, +}; + +/* + * Xclk 24Mhz + * max_framerate 30fps + * mipi_datarate per lane 720Mbps, 2lane + * raw 10 + * 2560 x 1440 + */ +static const struct regval os04d10_linear_10_2560x1440_regs[] = { + {0xfd, 0x00}, + {0x20, 0x00}, + {0x20, 0x01}, + {0x20, 0x01}, + {0x20, 0x01}, + {0x20, 0x01}, + {0x41, 0xa8}, + {0x45, 0x24}, + {0x31, 0x20}, + {0x38, 0x15}, + {0xfd, 0x01}, + {0x03, 0x00}, + {0x04, 0x04}, + {0x06, 0x01}, + {0x24, 0xff}, + {0x02, 0x01}, + {0x42, 0x5a}, + {0x47, 0x0c}, + {0x45, 0x02}, + {0x48, 0x0c}, + {0x4b, 0x88}, + {0xd4, 0x05}, + {0xd5, 0xd2}, + {0xd7, 0x05}, + {0xd8, 0xd2}, + {0x50, 0x01}, + {0x51, 0x11}, + {0x52, 0x18}, + {0x53, 0x01}, + {0x54, 0x01}, + {0x55, 0x01}, + {0x57, 0x08}, + {0x5c, 0x40}, + {0x7c, 0x06}, + {0x7d, 0x05}, + {0x7e, 0x05}, + {0x7f, 0x05}, + {0x90, 0x60}, + {0x91, 0x0f}, + {0x92, 0x35}, + {0x93, 0x36}, + {0x94, 0x0f}, + {0x95, 0x7e}, + {0x98, 0x5d}, + {0xa8, 0x50}, + {0xaa, 0x14}, + {0xab, 0x05}, + {0xac, 0x14}, + {0xad, 0x05}, + {0xae, 0x4a}, + {0xaf, 0x0e}, + {0xb2, 0x07}, + {0xb3, 0x0c}, + {0xc9, 0x28}, + {0xca, 0x5e}, + {0xcb, 0x5e}, + {0xcc, 0x5e}, + {0xcd, 0x5e}, + {0xce, 0x5c}, + {0xcf, 0x5c}, + {0xd0, 0x5c}, + {0xd1, 0x5c}, + {0xd2, 0x7c}, + {0xd3, 0x7c}, + {0xdb, 0x0f}, + {0xfd, 0x01}, + {0x46, 0x77}, + {0xdd, 0x00}, + {0xde, 0x3f}, + {0xfd, 0x03}, + {0x2b, 0x0a}, + {0x01, 0x22}, + {0x02, 0x03}, + {0x00, 0x06}, + {0x2a, 0x22}, + {0x29, 0x0b}, + {0x1e, 0x10}, + {0x1f, 0x02}, + {0x1a, 0x24}, + {0x1b, 0x62}, + {0x1c, 0xce}, + {0x1d, 0xd3}, + {0x04, 0x0f}, + {0x36, 0x00}, + {0x37, 0x05}, + {0x38, 0x09}, + {0x39, 0x19}, + {0x3a, 0x38}, + {0x3b, 0x22}, + {0x3c, 0x22}, + {0x3d, 0x22}, + {0x3e, 0x03}, + {0xfd, 0x02}, + {0x5e, 0x22}, + {0xa1, 0x04}, + {0xa2, 0x05}, + {0xa3, 0xa0}, + {0xa5, 0x04}, + {0xa6, 0x0a}, + {0xa7, 0x00}, + {0x8e, 0x0a}, + {0x8f, 0x00}, + {0x90, 0x05}, + {0x91, 0xa0}, + {0xce, 0x65}, + {0xfd, 0x03}, + {0x03, 0x30}, + {0x05, 0x00}, + {0x12, 0x70}, + {0x13, 0x70}, + {0x16, 0x13}, + {0x21, 0xca}, + {0x27, 0x95}, + {0x2c, 0x55}, + {0x2d, 0x08}, + {0x2e, 0xca}, + {0x3f, 0xe7}, + {0xfd, 0x00}, + {0x8b, 0x01}, + {0x8d, 0x00}, + {0xfd, 0x01}, + {0x01, 0x02}, + {0xfd, 0x05}, + {0xc4, 0x62}, + {0xc5, 0x62}, + {0xc6, 0x62}, + {0xc7, 0x62}, + {0xf0, 0x40}, + {0xf1, 0x40}, + {0xf2, 0x40}, + {0xf3, 0x40}, + {0xf4, 0x00}, + {0xf9, 0x03}, + {0xfa, 0x5d}, + {0xfb, 0x6b}, + {0xb1, 0x01}, + {REG_NULL, 0x00}, +}; + /* * Xclk 24Mhz * max_framerate 15fps @@ -307,6 +609,21 @@ static const struct regval os04d10_linear_10_2568x1448_regs[] = { }; static const struct os04d10_mode supported_modes[] = { + { + .width = 2560, + .height = 1440, + .max_fps = { + .numerator = 10000, + .denominator = 300000, + }, + .exp_def = 0x0080, + .hts_def = 0x032e, + .vts_def = 0x05c1, + .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10, + .reg_list = os04d10_linear_10_2560x1440_regs, + .hdr_mode = NO_HDR, + .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0, + }, { .width = 2568, .height = 1448, @@ -321,6 +638,21 @@ static const struct os04d10_mode supported_modes[] = { .reg_list = os04d10_linear_10_2568x1448_regs, .hdr_mode = NO_HDR, .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0, + }, + { + .width = 640, + .height = 360, + .max_fps = { + .numerator = 10000, + .denominator = 1200000, + }, + .exp_def = 0x0080, + .hts_def = 0x032e, + .vts_def = 0x0171, + .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10, + .reg_list = os04d10_linear_10_640x360_regs, + .hdr_mode = NO_HDR, + .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0, } };