From 810b044867eedec766c3173fb243c73a0cd1fe70 Mon Sep 17 00:00:00 2001
From: Mark Yao <mark.yao@rock-chips.com>
Date: Wed, 3 May 2017 16:25:50 +0800
Subject: [PATCH] ARM: dts: rk322x: add vop display node

Change-Id: Ic26431540260c758b6872020c36a41efdb2d82f2
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
---
 arch/arm/boot/dts/rk322x.dtsi | 29 ++++++++++++++++++++++++++---
 1 file changed, 26 insertions(+), 3 deletions(-)

diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
index cd8f2a3b0e91..ea344558ed62 100644
--- a/arch/arm/boot/dts/rk322x.dtsi
+++ b/arch/arm/boot/dts/rk322x.dtsi
@@ -566,17 +566,40 @@
 		status = "disabled";
 	};
 
-	vop_mmu: iommu@20053f00 {
+	vop: vop@20050000 {
+		compatible = "rockchip,rk322x-vop";
+		reg = <0x20050000 0x1ffc>;
+		reg-names = "regs";
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>;
+		reset-names = "axi", "ahb", "dclk";
+		iommus = <&vop_mmu>;
+		status = "disabled";
+
+		vop_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+	};
+
+	vop_mmu: iommu@20050300 {
 		compatible = "rockchip,iommu";
 		reg = <0x20053f00 0x100>;
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "vop_mmu";
 		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
-		clock-names = "aclk", "iface";
-		iommu-cells = <0>;
+		clock-names = "aclk", "hclk";
+		#iommu-cells = <0>;
 		status = "disabled";
 	};
 
+	display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+	};
+
 	iep_mmu: iommu@20070800 {
 		compatible = "rockchip,iommu";
 		reg = <0x20070800 0x100>;