From 813eabe45b0f10796abb0753ae69244ecf38c3c6 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Thu, 9 Feb 2023 14:25:39 +0800 Subject: [PATCH] clk: rockchip: rk3562: Make aclk pclk core CLK_IGNORE_UNUSED Don't add enable count to apll. Signed-off-by: Finley Xiao Change-Id: Id970ba227033599e894b3108af29bc6d2ae0cda5 --- drivers/clk/rockchip/clk-rk3562.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3562.c b/drivers/clk/rockchip/clk-rk3562.c index ae80763a6d84..68e0e241db06 100644 --- a/drivers/clk/rockchip/clk-rk3562.c +++ b/drivers/clk/rockchip/clk-rk3562.c @@ -466,10 +466,10 @@ static struct rockchip_clk_branch rk3562_clk_branches[] __initdata = { RK3562_CLKGATE_CON(27), 2, GFLAGS), /* PD_CORE */ - COMPOSITE_NOMUX(0, "aclk_core_pre", "armclk", CLK_IS_CRITICAL, + COMPOSITE_NOMUX(0, "aclk_core_pre", "armclk", CLK_IGNORE_UNUSED, RK3562_CLKSEL_CON(11), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY, RK3562_CLKGATE_CON(4), 3, GFLAGS), - COMPOSITE_NOMUX(0, "pclk_dbg_pre", "armclk", CLK_IS_CRITICAL, + COMPOSITE_NOMUX(0, "pclk_dbg_pre", "armclk", CLK_IGNORE_UNUSED, RK3562_CLKSEL_CON(12), 0, 4, DFLAGS | CLK_DIVIDER_READ_ONLY, RK3562_CLKGATE_CON(4), 5, GFLAGS), COMPOSITE_NOMUX(HCLK_CORE, "hclk_core", "gpll", CLK_IS_CRITICAL,