From 824c99261a9a7f809d80655fb7ac2dd97e8cc062 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Thu, 16 Dec 2021 10:32:34 +0800 Subject: [PATCH] PCI: rockchip: dw: Update link up check state PCIe Link up state is not only L0(0x11), but also other state like L0s, L1 and etc. Signed-off-by: Kever Yang Change-Id: I9b04d01ea38be6423c214f6cb474d045dff235d5 --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index c4047908f006..dda945e779ac 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -647,8 +647,7 @@ static int rk_pcie_link_up(struct dw_pcie *pci) return 1; } else { val = rk_pcie_readl_apb(rk_pcie, PCIE_CLIENT_LTSSM_STATUS); - if ((val & (RDLH_LINKUP | SMLH_LINKUP)) == 0x30000 && - (val & GENMASK(5, 0)) == 0x11) + if ((val & (RDLH_LINKUP | SMLH_LINKUP)) == 0x30000) return 1; }