From 84c3d1ed74b954b0d096addf2612398c3efef76e Mon Sep 17 00:00:00 2001
From: Dingqiang Lin <jon.lin@rock-chips.com>
Date: Fri, 26 Jan 2018 09:06:15 +0800
Subject: [PATCH] arm64: dts: rockchip: add nandc node for px30

Change-Id: Ifaa92e2d4ec1e35356a4051ae19084859149770e
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/px30.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi
index 29432925633e..a6eb5e7b0051 100644
--- a/arch/arm64/boot/dts/rockchip/px30.dtsi
+++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
@@ -1012,6 +1012,19 @@
 		status = "disabled";
 	};
 
+	nandc0: nandc@ff3b0000 {
+		compatible = "rockchip,rk-nandc";
+		reg = <0x0 0xff3b0000 0x0 0x4000>;
+		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+		nandc_id = <0>;
+		clocks = <&cru SCLK_NANDC>, <&cru HCLK_NANDC>;
+		clock-names = "clk_nandc", "hclk_nandc";
+		assigned-clocks = <&cru SCLK_NANDC>;
+		assigned-clock-parents = <&cru SCLK_NANDC_DIV50>;
+		power-domains = <&power PX30_PD_MMC_NAND>;
+		status = "disabled";
+	};
+
 	gpu: gpu@ff400000 {
 		compatible = "rockchip,px30-mali", "arm,mali-bifrost";
 		reg = <0x0 0xff400000 0x0 0x4000>;