From 8634d871e4b53081115932722cd96aaa8b43886e Mon Sep 17 00:00:00 2001 From: Sugar Zhang Date: Tue, 12 Jan 2021 15:26:23 +0800 Subject: [PATCH] dt-bindings: sound: rockchip: i2s: Document property 'mclk-calibrate' Change-Id: I05fa565ba77d77704f82e473ee3b35d6fcc8a6ec Signed-off-by: Sugar Zhang --- .../devicetree/bindings/sound/rockchip-i2s.txt | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt index 52dce673616d..01cb6216e37a 100644 --- a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt +++ b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt @@ -52,6 +52,12 @@ playback/capture: - rockchip,grf: the phandle of the syscon node for GRF register. +Optional properties: +- rockchip,mclk-calibrate: This is a boolean value, if present, enable + clk calibrate and compenation. + + note: the corresponding property 'i2s_clk_root' should be assigned. + Example for rk3288 I2S controller: i2s@ff890000 { @@ -66,3 +72,12 @@ i2s@ff890000 { rockchip,capture-channels = <2>; rockchip,bclk-fs = <64>; }; + +Example for RV1126 I2S controller with mclk-calibrate: + +&i2s1_2ch { + status = "okay"; + clocks = <&cru MCLK_I2S1>, <&cru HCLK_I2S1>, <&cru PLL_CPLL>; + clock-names = "i2s_clk", "i2s_hclk", "i2s_clk_root"; + rockchip,mclk-calibrate; +};