diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b98571158e14..4a9eecaa9529 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -168,8 +168,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb4-lp3-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb5-ddr4-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb6-ddr3-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb6-ddr3-v10-linux.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb6-ddr3-v10-rk628-rgb2dsi.dtb
-dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb6-ddr3-v10-rk628-rgb2lvds.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb6-ddr3-v10-rk630-bt656-to-cvbs.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb7-ddr4-v10.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb8-lp4-v10.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10-rk628-rgb2dsi.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10-rk628-rgb2dsi.dts
deleted file mode 100644
index 1cefbfa43d0f..000000000000
--- a/arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10-rk628-rgb2dsi.dts
+++ /dev/null
@@ -1,419 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
- */
-
-#include "rk3568-evb6-ddr3-v10.dtsi"
-#include "rk3568-android.dtsi"
-
-&dsi0 {
-	status = "disabled";
-};
-
-&video_phy0 {
-	status = "disabled";
-};
-
-&i2c3 {
-	clock-frequency = <400000>;
-	status = "okay";
-
-	rk628: rk628@50 {
-		reg = <0x50>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA0 IRQ_TYPE_LEVEL_HIGH>;
-		enable-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
-		reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
-		status = "okay";
-	};
-};
-
-#include <arm/rk628.dtsi>
-
-&backlight {
-	pwms = <&pwm14 0 25000 0>;
-};
-
-&pwm14 {
-	status = "okay";
-};
-
-&rk628_dsi0 {
-	status = "okay";
-
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			dsi0_in_post_process: endpoint {
-				remote-endpoint = <&post_process_out_dsi0>;
-			};
-		};
-	};
-
-	panel@0 {
-		compatible = "simple-panel-dsi";
-		reg = <0>;
-		backlight = <&backlight>;
-		enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
-		prepare-delay-ms = <120>;
-		enable-delay-ms = <120>;
-		disable-delay-ms = <120>;
-		unprepare-delay-ms = <120>;
-		init-delay-ms = <120>;
-
-		dsi,flags = <(MIPI_DSI_MODE_VIDEO |
-			      MIPI_DSI_MODE_VIDEO_BURST |
-			      MIPI_DSI_MODE_LPM |
-			      MIPI_DSI_MODE_EOT_PACKET)>;
-		dsi,format = <MIPI_DSI_FMT_RGB888>;
-		dsi,lanes = <4>;
-
-		panel-init-sequence = [
-			23 00 02 FE 21
-			23 00 02 04 00
-			23 00 02 00 64
-			23 00 02 2A 00
-			23 00 02 26 64
-			23 00 02 54 00
-			23 00 02 50 64
-			23 00 02 7B 00
-			23 00 02 77 64
-			23 00 02 A2 00
-			23 00 02 9D 64
-			23 00 02 C9 00
-			23 00 02 C5 64
-			23 00 02 01 71
-			23 00 02 27 71
-			23 00 02 51 71
-			23 00 02 78 71
-			23 00 02 9E 71
-			23 00 02 C6 71
-			23 00 02 02 89
-			23 00 02 28 89
-			23 00 02 52 89
-			23 00 02 79 89
-			23 00 02 9F 89
-			23 00 02 C7 89
-			23 00 02 03 9E
-			23 00 02 29 9E
-			23 00 02 53 9E
-			23 00 02 7A 9E
-			23 00 02 A0 9E
-			23 00 02 C8 9E
-			23 00 02 09 00
-			23 00 02 05 B0
-			23 00 02 31 00
-			23 00 02 2B B0
-			23 00 02 5A 00
-			23 00 02 55 B0
-			23 00 02 80 00
-			23 00 02 7C B0
-			23 00 02 A7 00
-			23 00 02 A3 B0
-			23 00 02 CE 00
-			23 00 02 CA B0
-			23 00 02 06 C0
-			23 00 02 2D C0
-			23 00 02 56 C0
-			23 00 02 7D C0
-			23 00 02 A4 C0
-			23 00 02 CB C0
-			23 00 02 07 CF
-			23 00 02 2F CF
-			23 00 02 58 CF
-			23 00 02 7E CF
-			23 00 02 A5 CF
-			23 00 02 CC CF
-			23 00 02 08 DD
-			23 00 02 30 DD
-			23 00 02 59 DD
-			23 00 02 7F DD
-			23 00 02 A6 DD
-			23 00 02 CD DD
-			23 00 02 0E 15
-			23 00 02 0A E9
-			23 00 02 36 15
-			23 00 02 32 E9
-			23 00 02 5F 15
-			23 00 02 5B E9
-			23 00 02 85 15
-			23 00 02 81 E9
-			23 00 02 AD 15
-			23 00 02 A9 E9
-			23 00 02 D3 15
-			23 00 02 CF E9
-			23 00 02 0B 14
-			23 00 02 33 14
-			23 00 02 5C 14
-			23 00 02 82 14
-			23 00 02 AA 14
-			23 00 02 D0 14
-			23 00 02 0C 36
-			23 00 02 34 36
-			23 00 02 5D 36
-			23 00 02 83 36
-			23 00 02 AB 36
-			23 00 02 D1 36
-			23 00 02 0D 6B
-			23 00 02 35 6B
-			23 00 02 5E 6B
-			23 00 02 84 6B
-			23 00 02 AC 6B
-			23 00 02 D2 6B
-			23 00 02 13 5A
-			23 00 02 0F 94
-			23 00 02 3B 5A
-			23 00 02 37 94
-			23 00 02 64 5A
-			23 00 02 60 94
-			23 00 02 8A 5A
-			23 00 02 86 94
-			23 00 02 B2 5A
-			23 00 02 AE 94
-			23 00 02 D8 5A
-			23 00 02 D4 94
-			23 00 02 10 D1
-			23 00 02 38 D1
-			23 00 02 61 D1
-			23 00 02 87 D1
-			23 00 02 AF D1
-			23 00 02 D5 D1
-			23 00 02 11 04
-			23 00 02 39 04
-			23 00 02 62 04
-			23 00 02 88 04
-			23 00 02 B0 04
-			23 00 02 D6 04
-			23 00 02 12 05
-			23 00 02 3A 05
-			23 00 02 63 05
-			23 00 02 89 05
-			23 00 02 B1 05
-			23 00 02 D7 05
-			23 00 02 18 AA
-			23 00 02 14 36
-			23 00 02 42 AA
-			23 00 02 3D 36
-			23 00 02 69 AA
-			23 00 02 65 36
-			23 00 02 8F AA
-			23 00 02 8B 36
-			23 00 02 B7 AA
-			23 00 02 B3 36
-			23 00 02 DD AA
-			23 00 02 D9 36
-			23 00 02 15 74
-			23 00 02 3F 74
-			23 00 02 66 74
-			23 00 02 8C 74
-			23 00 02 B4 74
-			23 00 02 DA 74
-			23 00 02 16 9F
-			23 00 02 40 9F
-			23 00 02 67 9F
-			23 00 02 8D 9F
-			23 00 02 B5 9F
-			23 00 02 DB 9F
-			23 00 02 17 DC
-			23 00 02 41 DC
-			23 00 02 68 DC
-			23 00 02 8E DC
-			23 00 02 B6 DC
-			23 00 02 DC DC
-			23 00 02 1D FF
-			23 00 02 19 03
-			23 00 02 47 FF
-			23 00 02 43 03
-			23 00 02 6E FF
-			23 00 02 6A 03
-			23 00 02 94 FF
-			23 00 02 90 03
-			23 00 02 BC FF
-			23 00 02 B8 03
-			23 00 02 E2 FF
-			23 00 02 DE 03
-			23 00 02 1A 35
-			23 00 02 44 35
-			23 00 02 6B 35
-			23 00 02 91 35
-			23 00 02 B9 35
-			23 00 02 DF 35
-			23 00 02 1B 45
-			23 00 02 45 45
-			23 00 02 6C 45
-			23 00 02 92 45
-			23 00 02 BA 45
-			23 00 02 E0 45
-			23 00 02 1C 55
-			23 00 02 46 55
-			23 00 02 6D 55
-			23 00 02 93 55
-			23 00 02 BB 55
-			23 00 02 E1 55
-			23 00 02 22 FF
-			23 00 02 1E 68
-			23 00 02 4C FF
-			23 00 02 48 68
-			23 00 02 73 FF
-			23 00 02 6F 68
-			23 00 02 99 FF
-			23 00 02 95 68
-			23 00 02 C1 FF
-			23 00 02 BD 68
-			23 00 02 E7 FF
-			23 00 02 E3 68
-			23 00 02 1F 7E
-			23 00 02 49 7E
-			23 00 02 70 7E
-			23 00 02 96 7E
-			23 00 02 BE 7E
-			23 00 02 E4 7E
-			23 00 02 20 97
-			23 00 02 4A 97
-			23 00 02 71 97
-			23 00 02 97 97
-			23 00 02 BF 97
-			23 00 02 E5 97
-			23 00 02 21 B5
-			23 00 02 4B B5
-			23 00 02 72 B5
-			23 00 02 98 B5
-			23 00 02 C0 B5
-			23 00 02 E6 B5
-			23 00 02 25 F0
-			23 00 02 23 E8
-			23 00 02 4F F0
-			23 00 02 4D E8
-			23 00 02 76 F0
-			23 00 02 74 E8
-			23 00 02 9C F0
-			23 00 02 9A E8
-			23 00 02 C4 F0
-			23 00 02 C2 E8
-			23 00 02 EA F0
-			23 00 02 E8 E8
-			23 00 02 24 FF
-			23 00 02 4E FF
-			23 00 02 75 FF
-			23 00 02 9B FF
-			23 00 02 C3 FF
-			23 00 02 E9 FF
-			23 00 02 FE 3D
-			23 00 02 00 04
-			23 00 02 FE 23
-			23 00 02 08 82
-			23 00 02 0A 00
-			23 00 02 0B 00
-			23 00 02 0C 01
-			23 00 02 16 00
-			23 00 02 18 02
-			23 00 02 1B 04
-			23 00 02 19 04
-			23 00 02 1C 81
-			23 00 02 1F 00
-			23 00 02 20 03
-			23 00 02 23 04
-			23 00 02 21 01
-			23 00 02 54 63
-			23 00 02 55 54
-			23 00 02 6E 45
-			23 00 02 6D 36
-			23 00 02 FE 3D
-			23 00 02 55 78
-			23 00 02 FE 20
-			23 00 02 26 30
-			23 00 02 FE 3D
-			23 00 02 20 71
-			23 00 02 50 8F
-			23 00 02 51 8F
-			23 00 02 FE 00
-			23 00 02 35 00
-			05 78 01 11
-			05 1E 01 29
-		];
-
-		panel-exit-sequence = [
-			05 00 01 28
-			05 00 01 10
-		];
-
-		disp_timings3: display-timings {
-			native-mode = <&dsi0_timing3>;
-			dsi0_timing3: timing0 {
-				clock-frequency = <132000000>;
-				hactive = <1080>;
-				vactive = <1920>;
-				hfront-porch = <15>;
-				hsync-len = <2>;
-				hback-porch = <30>;
-				vfront-porch = <15>;
-				vsync-len = <2>;
-				vback-porch = <15>;
-				hsync-active = <0>;
-				vsync-active = <0>;
-				de-active = <0>;
-				pixelclk-active = <1>;
-			};
-		};
-	};
-};
-
-&rk628_combtxphy {
-	status = "okay";
-};
-
-&rk628_post_process {
-	pinctrl-names = "default";
-	pinctrl-0 = <&rk628_vop_pins>;
-	status = "okay";
-
-	mode-sync-pol = <0>;
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			post_process_in_rgb: endpoint {
-				remote-endpoint = <&rgb_out_post_process>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			post_process_out_dsi0: endpoint {
-				remote-endpoint = <&dsi0_in_post_process>;
-			};
-		};
-	};
-};
-
-&rgb {
-	status = "okay";
-
-	ports {
-		port@1 {
-			reg = <1>;
-
-			rgb_out_post_process: endpoint {
-				remote-endpoint = <&post_process_in_rgb>;
-			};
-		};
-	};
-};
-
-&rgb_in_vp2 {
-	status = "okay";
-};
-
-&vcc3v3_lcd1_n {
-	status = "disabled";
-	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
-	enable-active-high;
-};
diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10-rk628-rgb2lvds.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10-rk628-rgb2lvds.dts
deleted file mode 100644
index ec43b24ddab1..000000000000
--- a/arch/arm64/boot/dts/rockchip/rk3568-evb6-ddr3-v10-rk628-rgb2lvds.dts
+++ /dev/null
@@ -1,173 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
- */
-
-#include <dt-bindings/display/media-bus-format.h>
-#include "rk3568-evb6-ddr3-v10.dtsi"
-#include "rk3568-android.dtsi"
-
-/ {
-	vcc33_lcd: vcc33-lcd {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc33_lcd";
-		regulator-boot-on;
-		regulator-always-on;
-		gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
-	};
-
-	panel {
-		compatible = "simple-panel";
-		power-supply = <&vcc33_lcd>;
-		backlight = <&backlight>;
-		enable-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
-		prepare-delay-ms = <20>;
-		enable-delay-ms = <20>;
-		disable-delay-ms = <20>;
-		unprepare-delay-ms = <20>;
-		bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA>;
-
-		display-timings {
-			native-mode = <&timing0>;
-
-			timing0: timing0 {
-				clock-frequency = <66600000>;
-				hactive = <800>;
-				vactive = <1280>;
-				hback-porch = <30>;
-				hfront-porch = <30>;
-				vback-porch = <3>;
-				vfront-porch = <3>;
-				hsync-len = <4>;
-				vsync-len = <2>;
-				hsync-active = <0>;
-				vsync-active = <0>;
-				de-active = <0>;
-				pixelclk-active = <0>;
-			};
-		};
-
-		port {
-			panel_in_lvds: endpoint {
-				remote-endpoint = <&lvds_out_panel>;
-			};
-		};
-	};
-};
-
-&dsi0 {
-	status = "disabled";
-};
-
-&video_phy0 {
-	status = "disabled";
-};
-
-&i2c3 {
-	clock-frequency = <400000>;
-	status = "okay";
-
-	rk628: rk628@50 {
-		reg = <0x50>;
-		interrupt-parent = <&gpio0>;
-		interrupts = <RK_PA0 IRQ_TYPE_LEVEL_HIGH>;
-		enable-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
-		reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
-		status = "okay";
-	};
-};
-
-#include <arm/rk628.dtsi>
-
-&backlight {
-	pwms = <&pwm14 0 25000 0>;
-};
-
-&pwm14 {
-	status = "okay";
-};
-
-&rk628_lvds {
-	status = "okay";
-
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			lvds_in_post_process: endpoint {
-				remote-endpoint = <&post_process_out_lvds>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			lvds_out_panel: endpoint {
-				remote-endpoint = <&panel_in_lvds>;
-			};
-		};
-	};
-};
-&rk628_combtxphy {
-	status = "okay";
-};
-
-&rk628_post_process {
-	pinctrl-names = "default";
-	pinctrl-0 = <&rk628_vop_pins>;
-	status = "okay";
-
-	mode-sync-pol = <0>;
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			post_process_in_rgb: endpoint {
-				remote-endpoint = <&rgb_out_post_process>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			post_process_out_lvds: endpoint {
-				remote-endpoint = <&lvds_in_post_process>;
-			};
-		};
-	};
-};
-
-&rgb {
-	status = "okay";
-
-	ports {
-		port@1 {
-			reg = <1>;
-
-			rgb_out_post_process: endpoint {
-				remote-endpoint = <&post_process_in_rgb>;
-			};
-		};
-	};
-};
-
-&rgb_in_vp2 {
-	status = "okay";
-};
-
-&vcc3v3_lcd1_n {
-	status = "disabled";
-	gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
-	enable-active-high;
-};
-
-&gmac1 {
-	status = "disabled";
-};