From 881f3296b3ab5cabc29ba0d0de4fa4aecea257ae Mon Sep 17 00:00:00 2001
From: Finley Xiao <finley.xiao@rock-chips.com>
Date: Fri, 28 Feb 2020 11:18:26 +0800
Subject: [PATCH] ARM: dts: rv1126: Add otp device node

Change-Id: Iaaf59c06924e9f6e86665523b63d0e6e9bd81768
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
---
 arch/arm/boot/dts/rv1126.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm/boot/dts/rv1126.dtsi b/arch/arm/boot/dts/rv1126.dtsi
index 4f24eacf3588..38fe4a28d001 100644
--- a/arch/arm/boot/dts/rv1126.dtsi
+++ b/arch/arm/boot/dts/rv1126.dtsi
@@ -789,6 +789,30 @@
 		status = "disabled";
 	};
 
+	otp: otp@ff5c0000 {
+		compatible = "rockchip,rv1126-otp";
+		reg = <0xff5c0000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru CLK_OTP>, <&cru PCLK_OTP>;
+		clock-names = "otp", "apb_pclk";
+		status = "disabled";
+
+		/* Data cells */
+		otp_id: id@7 {
+			reg = <0x07 0x10>;
+		};
+		cpu_leakage: cpu-leakage@17 {
+			reg = <0x17 0x1>;
+		};
+		logic_leakage: logic-leakage@18 {
+			reg = <0x18 0x1>;
+		};
+		npu_leakage: npu-leakage@19 {
+			reg = <0x19 0x1>;
+		};
+	};
+
 	saradc: saradc@ff5e0000 {
 		compatible = "rockchip,rk3399-saradc";
 		reg = <0xff5e0000 0x100>;