From 886d0dc5826acb3881fcd2dfa2e43743dca06a58 Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Fri, 5 Jan 2018 10:09:35 +0800 Subject: [PATCH] arm64: dts: rockchip: Add mipi_dphy node for PX30 Change-Id: I92c6bfe60dfe0c89befddad528c8d41a2318567a Signed-off-by: Wyon Bi --- arch/arm64/boot/dts/rockchip/px30.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 6a6447bf9e2e..a021570c7400 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -558,6 +558,21 @@ <75000000>, <416000000>; }; + mipi_dphy: mipi-dphy@ff2e0000 { + compatible = "rockchip,px30-mipi-dphy"; + reg = <0x0 0xff2e0000 0x0 0x10000>; + clocks = <&cru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>; + clock-names = "ref", "pclk"; + clock-output-names = "mipi_dphy_pll"; + #clock-cells = <0>; + resets = <&cru SRST_MIPIDSIPHY_P>; + reset-names = "apb"; + power-domains = <&power PX30_PD_VO>; + #phy-cells = <0>; + rockchip,grf = <&grf>; + status = "disabled"; + }; + lvds: lvds@ff2e0000 { compatible = "rockchip,px30-lvds"; reg = <0x0 0xff2e0000 0x0 0x100>, <0x0 0xff2e0100 0x0 0x100>;