ODROID:Merge BSP 2019.04 (fix build err-vin)

Change-Id: I4bf9a1634e613e768dcc48248c6e4ff9f3f3d239

drivers/amlogic/media/vin/tvin/tvin_global.h

@@ -447,6 +447,19 @@ struct tvin_hdr_info_s {
 	unsigned int hdr_check_cnt;
 };
 
+enum tvin_cn_type_e {
+	GRAPHICS,
+	PHOTO,
+	CINEMA,
+	GAME,
+};
+
+struct tvin_latency_s {
+	bool allm_mode;
+	bool it_content;
+	enum tvin_cn_type_e cn_type;
+};
+
 struct tvin_sig_property_s {
 	enum tvin_trans_fmt	trans_fmt;
 	enum tvin_color_fmt_e	color_format;
@@ -473,6 +486,7 @@ struct tvin_sig_property_s {
 	bool low_latency;/*is low latency dolby mode*/
 	uint8_t fps;
 	unsigned int skip_vf_num;/*skip pre vframe num*/
+	struct tvin_latency_s latency;
 };
 
 #define TVAFE_VF_POOL_SIZE			6 /* 8 */

drivers/amlogic/media/vin/tvin/vdin/vdin_afbce.c

@@ -79,8 +79,6 @@ unsigned int vdin_afbce_cma_alloc(struct vdin_dev_s *devp)
 	unsigned int afbce_mem_used;
 	unsigned int frame_head_size;
 	unsigned int mmu_used;
-	//unsigned long afbce_head_phy_addr;
-	//unsigned long afbce_table_phy_addr;
 	unsigned long body_start_paddr;
 
 	if (devp->rdma_enable)
@@ -285,8 +283,7 @@ unsigned int vdin_afbce_cma_alloc(struct vdin_dev_s *devp)
 	/* set fm_head_paddr start */
 	frame_head_size = (int)roundup(devp->vfmem_size, 128);
 	/*h_active * v_active / 128 * 4 = frame_head_size*/
-	frame_head_size = devp->h_active * devp->v_active / 32;
-	frame_head_size = PAGE_ALIGN(frame_head_size);
+	frame_head_size = PAGE_ALIGN(frame_head_size / 32);
 
 	devp->afbce_info->frame_head_size = frame_head_size;
 
@@ -711,18 +708,19 @@ void vdin_afbce_set_next_frame(struct vdin_dev_s *devp,
 	unsigned int rdma_enable, struct vf_entry *vfe)
 {
 	unsigned char i;
-	unsigned int cur_mmu_used;
 
 	i = vfe->af_num;
-	cur_mmu_used = devp->afbce_info->fm_table_paddr[i] / 4;
+	vfe->vf.compHeadAddr = devp->afbce_info->fm_head_paddr[i];
+	vfe->vf.compBodyAddr = devp->afbce_info->fm_body_paddr[i];
 
-#ifdef CONFIG_AML_RDMA
-	if (rdma_enable)
-		rdma_write_reg_bits(devp->rdma_handle,
-			AFBCE_HEAD_BADDR, devp->afbce_info->fm_head_paddr[i]);
-		rdma_write_reg(devp->rdma_handle,
-			AFBCE_MMU_RMIF_SCOPE_X, cur_mmu_used, 0, 12);
-	else
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
+	if (rdma_enable) {
+		rdma_write_reg(devp->rdma_handle, AFBCE_HEAD_BADDR,
+			devp->afbce_info->fm_head_paddr[i]);
+		rdma_write_reg_bits(devp->rdma_handle, AFBCE_MMU_RMIF_CTRL4,
+			devp->afbce_info->fm_table_paddr[i], 0, 32);
+		rdma_write_reg_bits(devp->rdma_handle, AFBCE_ENABLE, 1, 0, 1);
+	} else
 #endif
 	{
 		pr_info("afbce must use RDMA.\n");

drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.c

@@ -541,6 +541,8 @@ void vdin_get_format_convert(struct vdin_dev_s *devp)
 				format_convert = VDIN_FORMAT_CONVERT_YUV_NV21;
 			else if (devp->prop.dest_cfmt == TVIN_NV12)
 				format_convert = VDIN_FORMAT_CONVERT_YUV_NV12;
+			else if (devp->prop.dest_cfmt == TVIN_YUV444)
+				format_convert = VDIN_FORMAT_CONVERT_YUV_YUV444;
 			else
 				format_convert = VDIN_FORMAT_CONVERT_YUV_YUV422;
 			break;
@@ -1552,9 +1554,10 @@ static void vdin_set_color_matrix0_g12a(unsigned int offset,
 			VDIN_MATRIX_COEF_INDEX_BIT, VDIN_MATRIX_COEF_INDEX_WID);
 
 		wr(offset,
-			VDIN_MATRIX_PRE_OFFSET0_1, matrix_tbl->pre_offset0_1);
+			VDIN_HDR2_MATRIXI_PRE_OFFSET0_1,
+				matrix_tbl->pre_offset0_1);
 		wr(offset,
-			VDIN_MATRIX_PRE_OFFSET2, matrix_tbl->pre_offset2);
+			VDIN_HDR2_MATRIXI_PRE_OFFSET2, matrix_tbl->pre_offset2);
 		wr(offset, VDIN_HDR2_MATRIXI_COEF00_01, matrix_tbl->coef00_01);
 		wr(offset, VDIN_HDR2_MATRIXI_COEF02_10, matrix_tbl->coef02_10);
 		wr(offset, VDIN_HDR2_MATRIXI_COEF11_12, matrix_tbl->coef11_12);
@@ -2043,7 +2046,7 @@ void vdin_set_wr_ctrl_vsync(struct vdin_dev_s *devp,
 		hconv_mode = 2;
 		swap_cbcr = 0;
 	}
-#ifdef CONFIG_AML_RDMA
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
 	if (rdma_enable) {
 		rdma_write_reg_bits(devp->rdma_handle,
 			VDIN_WR_CTRL+devp->addr_offset,
@@ -2137,9 +2140,10 @@ unsigned int vdin_get_total_v(unsigned int offset)
 void vdin_set_canvas_id(struct vdin_dev_s *devp, unsigned int rdma_enable,
 			unsigned int canvas_id)
 {
-#ifdef CONFIG_AML_RDMA
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
 	if (rdma_enable) {
-		if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
+		if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
+			is_meson_sm1_cpu()) {
 			rdma_write_reg_bits(devp->rdma_handle,
 				VDIN_COM_CTRL0+devp->addr_offset, 1,
 				VDIN_FORCEGOLINE_EN_BIT, 1);
@@ -2163,7 +2167,7 @@ unsigned int vdin_get_canvas_id(unsigned int offset)
 void vdin_set_chma_canvas_id(struct vdin_dev_s *devp, unsigned int rdma_enable,
 		unsigned int canvas_id)
 {
-#ifdef CONFIG_AML_RDMA
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
 	if (rdma_enable)
 		rdma_write_reg_bits(devp->rdma_handle,
 				VDIN_WR_CTRL2+devp->addr_offset,
@@ -4195,6 +4199,14 @@ u32 vdin_get_curr_field_type(struct vdin_dev_s *devp)
 		type &= (~VIDTYPE_VIU_SINGLE_PLANE);
 
 	}
+
+	if (devp->afbce_mode == 1) {
+		type |= VIDTYPE_COMPRESS;
+		type |= VIDTYPE_SCATTER;
+		if (devp->afbce_lossy_en == 1)
+			type |= VIDTYPE_COMPRESS_LOSS;
+	}
+
 	return type;
 }
 

drivers/amlogic/media/vin/tvin/vdin/vdin_debug.c

@@ -1583,6 +1583,9 @@ start_chk:
 		} else if (!strcmp(parm[1], "video")) {
 			param.port = TVIN_PORT_VIU1_VIDEO;
 			pr_info(" port is TVIN_PORT_VIU_VIDEO\n");
+		} else if (!strcmp(parm[1], "viu_wb0_vpp")) {
+			param.port = TVIN_PORT_VIU1_WB0_VPP;
+			pr_info(" port is TVIN_PORT_VIU1_WB0_VPP\n");
 		} else if (!strcmp(parm[1], "viu_wb0_vd1")) {
 			param.port = TVIN_PORT_VIU1_WB0_VD1;
 			pr_info(" port is TVIN_PORT_VIU_WB0_VD1\n");
@@ -1598,6 +1601,9 @@ start_chk:
 		} else if (!strcmp(parm[1], "viu_wb0_post_blend")) {
 			param.port = TVIN_PORT_VIU1_WB0_POST_BLEND;
 			pr_info(" port is TVIN_PORT_VIU_WB0_POST_BLEND\n");
+		} else if (!strcmp(parm[1], "viu_wb1_vpp")) {
+			param.port = TVIN_PORT_VIU1_WB1_VPP;
+			pr_info(" port is TVIN_PORT_VIU1_WB1_VPP\n");
 		} else if (!strcmp(parm[1], "viu_wb1_vd1")) {
 			param.port = TVIN_PORT_VIU1_WB1_VD1;
 			pr_info(" port is TVIN_PORT_VIU_WB1_VD1\n");
@@ -1619,6 +1625,9 @@ start_chk:
 		} else if (!strcmp(parm[1], "video2")) {
 			param.port = TVIN_PORT_VIU2_VIDEO;
 			pr_info(" port is TVIN_PORT_VIU_VIDEO\n");
+		} else if (!strcmp(parm[1], "viu2_wb0_vpp")) {
+			param.port = TVIN_PORT_VIU2_WB0_VPP;
+			pr_info(" port is TVIN_PORT_VIU2_WB0_VPP\n");
 		} else if (!strcmp(parm[1], "viu2_wb0_vd1")) {
 			param.port = TVIN_PORT_VIU2_WB0_VD1;
 			pr_info(" port is TVIN_PORT_VIU_WB0_VD1\n");
@@ -1634,6 +1643,9 @@ start_chk:
 		} else if (!strcmp(parm[1], "viu2_wb0_post_blend")) {
 			param.port = TVIN_PORT_VIU2_WB0_POST_BLEND;
 			pr_info(" port is TVIN_PORT_VIU_WB0_POST_BLEND\n");
+		} else if (!strcmp(parm[1], "viu2_wb1_vpp")) {
+			param.port = TVIN_PORT_VIU2_WB1_VPP;
+			pr_info(" port is TVIN_PORT_VIU2_WB1_VPP\n");
 		} else if (!strcmp(parm[1], "viu2_wb1_vd1")) {
 			param.port = TVIN_PORT_VIU2_WB1_VD1;
 			pr_info(" port is TVIN_PORT_VIU_WB1_VD1\n");

drivers/amlogic/media/vin/tvin/vdin/vdin_drv.c

@@ -133,6 +133,10 @@ MODULE_PARM_DESC(dv_work_delby, "dv_work_delby");
 
 module_param(game_mode_switch_frames, int, 0664);
 MODULE_PARM_DESC(game_mode_switch_frames, "game mode switch <n> frames");
+
+module_param(game_mode_phlock_switch_frames, int, 0664);
+MODULE_PARM_DESC(game_mode_phlock_switch_frames,
+		"game mode switch <n> frames for phase_lock");
 #endif
 
 bool vdin_dbg_en;
@@ -318,6 +322,9 @@ static void vdin_game_mode_check(struct vdin_dev_s *devp)
 			VDIN_GAME_MODE_SWITCH_EN);
 	else
 		devp->game_mode = 0;
+
+	pr_info("%s: game_mode flag=%d, game_mode=%d\n",
+		__func__, game_mode, devp->game_mode);
 }
 /*
  *based on the bellow parameters:
@@ -368,17 +375,24 @@ static void vdin_vf_init(struct vdin_dev_s *devp)
 		/*if output fmt is nv21 or nv12 ,
 		 * use the two continuous canvas for one field
 		 */
-		if ((devp->prop.dest_cfmt == TVIN_NV12) ||
-			(devp->prop.dest_cfmt == TVIN_NV21)) {
-			chromaid =
+		if (devp->afbce_mode == 0) {
+			if ((devp->prop.dest_cfmt == TVIN_NV12) ||
+				(devp->prop.dest_cfmt == TVIN_NV21)) {
+				chromaid =
 				(vdin_canvas_ids[index][(vf->index<<1)+1])<<8;
-			addr =
-				vdin_canvas_ids[index][vf->index<<1] |
-				chromaid;
-		} else
-			addr = vdin_canvas_ids[index][vf->index];
+				addr =
+					vdin_canvas_ids[index][vf->index<<1] |
+					chromaid;
+			} else
+				addr = vdin_canvas_ids[index][vf->index];
 
-		vf->canvas0Addr = vf->canvas1Addr = addr;
+			vf->canvas0Addr = vf->canvas1Addr = addr;
+		} else if (devp->afbce_mode == 1) {
+			vf->compHeadAddr = devp->afbce_info->fm_head_paddr[i];
+			vf->compBodyAddr = devp->afbce_info->fm_body_paddr[i];
+			vf->compWidth  = devp->h_active;
+			vf->compHeight = devp->v_active;
+		}
 
 		/* set source type & mode */
 		vdin_set_source_type(devp, vf);
@@ -414,7 +428,7 @@ static void vdin_vf_init(struct vdin_dev_s *devp)
 	}
 }
 
-#ifdef CONFIG_AML_RDMA
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
 static void vdin_rdma_irq(void *arg)
 {
 	struct vdin_dev_s *devp = arg;
@@ -623,7 +637,7 @@ void vdin_start_dec(struct vdin_dev_s *devp)
 		devp->frontend->dec_ops->start(devp->frontend,
 				devp->parm.info.fmt);
 
-#ifdef CONFIG_AML_RDMA
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
 	/*it is better put after all reg init*/
 	if (devp->rdma_enable && devp->rdma_handle > 0)
 		devp->flags |= VDIN_FLAG_RDMA_ENABLE;
@@ -661,6 +675,7 @@ void vdin_start_dec(struct vdin_dev_s *devp)
 	devp->irq_cnt = 0;
 	devp->rdma_irq_cnt = 0;
 	devp->frame_cnt = 0;
+	phase_lock_flag = 0;
 
 	if (time_en)
 		pr_info("vdin.%d start time: %ums, run time:%ums.\n",
@@ -772,7 +787,7 @@ void vdin_stop_dec(struct vdin_dev_s *devp)
 	switch_vpu_mem_pd_vmod(devp->addr_offset?VPU_VIU_VDIN1:VPU_VIU_VDIN0,
 			VPU_MEM_POWER_DOWN);
 	memset(&devp->prop, 0, sizeof(struct tvin_sig_property_s));
-#ifdef CONFIG_AML_RDMA
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
 	rdma_clear(devp->rdma_handle);
 #endif
 	devp->flags &= (~VDIN_FLAG_RDMA_ENABLE);
@@ -1957,19 +1972,20 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
 
 	/* prepare for next input data */
 	next_wr_vfe = provider_vf_get(devp->vfp);
-	if (devp->afbce_mode == 0)
+	if (devp->afbce_mode == 0) {
 		vdin_set_canvas_id(devp, (devp->flags&VDIN_FLAG_RDMA_ENABLE),
 			(next_wr_vfe->vf.canvas0Addr&0xff));
-	else if (devp->afbce_mode == 1)
+
+		/* prepare for chroma canvas*/
+		if ((devp->prop.dest_cfmt == TVIN_NV12) ||
+			(devp->prop.dest_cfmt == TVIN_NV21))
+			vdin_set_chma_canvas_id(devp,
+				(devp->flags&VDIN_FLAG_RDMA_ENABLE),
+				(next_wr_vfe->vf.canvas0Addr>>8)&0xff);
+	} else if (devp->afbce_mode == 1) {
 		vdin_afbce_set_next_frame(devp,
 			(devp->flags&VDIN_FLAG_RDMA_ENABLE), next_wr_vfe);
-
-	/* prepare for chroma canvas*/
-	if ((devp->prop.dest_cfmt == TVIN_NV12) ||
-		(devp->prop.dest_cfmt == TVIN_NV21))
-		vdin_set_chma_canvas_id(devp,
-			(devp->flags&VDIN_FLAG_RDMA_ENABLE),
-			(next_wr_vfe->vf.canvas0Addr>>8)&0xff);
+	}
 
 	devp->curr_wr_vfe = next_wr_vfe;
 	/* debug for video latency */
@@ -2075,7 +2091,7 @@ irq_handled:
 		vdin_vf_disp_mode_skip(devp->vfp);
 
 	spin_unlock_irqrestore(&devp->isr_lock, flags);
-#ifdef CONFIG_AML_RDMA
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
 	if (devp->flags & VDIN_FLAG_RDMA_ENABLE)
 		rdma_config(devp->rdma_handle,
 			(devp->rdma_enable&1) ?
@@ -2233,18 +2249,19 @@ irqreturn_t vdin_v4l2_isr(int irq, void *dev_id)
 
 	/* prepare for next input data */
 	next_wr_vfe = provider_vf_get(devp->vfp);
-	if (devp->afbce_mode == 0)
+	if (devp->afbce_mode == 0) {
 		vdin_set_canvas_id(devp, (devp->flags&VDIN_FLAG_RDMA_ENABLE),
 			(next_wr_vfe->vf.canvas0Addr&0xff));
-	else if (devp->afbce_mode == 1)
-		vdin_afbce_set_next_frame(devp,
-			(devp->flags&VDIN_FLAG_RDMA_ENABLE), next_wr_vfe);
 
 	if ((devp->prop.dest_cfmt == TVIN_NV12) ||
 			(devp->prop.dest_cfmt == TVIN_NV21))
 		vdin_set_chma_canvas_id(devp,
 				(devp->flags&VDIN_FLAG_RDMA_ENABLE),
 				(next_wr_vfe->vf.canvas0Addr>>8)&0xff);
+	} else if (devp->afbce_mode == 1) {
+		vdin_afbce_set_next_frame(devp,
+			(devp->flags&VDIN_FLAG_RDMA_ENABLE), next_wr_vfe);
+	}
 
 	devp->curr_wr_vfe = next_wr_vfe;
 	vf_notify_receiver(devp->name, VFRAME_EVENT_PROVIDER_VFRAME_READY,
@@ -2252,7 +2269,7 @@ irqreturn_t vdin_v4l2_isr(int irq, void *dev_id)
 
 irq_handled:
 	spin_unlock_irqrestore(&devp->isr_lock, flags);
-#ifdef CONFIG_AML_RDMA
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
 	if (devp->flags & VDIN_FLAG_RDMA_ENABLE)
 		rdma_config(devp->rdma_handle,
 			(devp->rdma_enable&1) ?
@@ -2594,7 +2611,8 @@ static long vdin_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 
 			devp_vdin1->debug.scaler4w = 1280;
 			devp_vdin1->debug.scaler4h = 720;
-			devp_vdin1->debug.dest_cfmt = TVIN_YUV422;
+			/* vdin1 follow vdin0 afbc dest_cfmt */
+			devp_vdin1->debug.dest_cfmt = devp->prop.dest_cfmt;
 			devp_vdin1->flags |= VDIN_FLAG_MANUAL_CONVERSION;
 
 			vdin_start_dec(devp_vdin1);
@@ -3174,6 +3192,7 @@ static int vdin_drv_probe(struct platform_device *pdev)
 	int ret = 0;
 	struct vdin_dev_s *vdevp;
 	struct resource *res;
+	unsigned int val;
 	unsigned int urgent_en = 0;
 	unsigned int bit_mode = VDIN_WR_COLOR_DEPTH_8BIT;
 	/* const void *name; */
@@ -3304,7 +3323,7 @@ static int vdin_drv_probe(struct platform_device *pdev)
 	spin_lock_init(&tl1_preview_lock);
 	/*set afbce mode*/
 	ret = of_property_read_u32(pdev->dev.of_node,
-		"afbce_bit_mode", &vdevp->afbce_mode);
+		"afbce_bit_mode", &val);
 	if (ret) {
 		vdevp->afbce_flag = 0;
 	} else {
@@ -3486,7 +3505,7 @@ static int vdin_drv_remove(struct platform_device *pdev)
 	vdevp = platform_get_drvdata(pdev);
 
 	ret = cancel_delayed_work(&vdevp->vlock_dwork);
-#ifdef CONFIG_AML_RDMA
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
 	rdma_unregister(vdevp->rdma_handle);
 #endif
 	mutex_destroy(&vdevp->fe_lock);

drivers/amlogic/media/vin/tvin/vdin/vdin_drv.h

@@ -36,8 +36,8 @@
 #include <linux/amlogic/media/vfm/vframe_receiver.h>
 #include <linux/amlogic/media/vfm/vframe_provider.h>
 #include <linux/amlogic/media/frame_provider/tvin/tvin_v4l2.h>
-#ifdef CONFIG_AML_RDMA
-#include <linux/amlogic/rdma/rdma_mgr.h>
+#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
+#include <linux/amlogic/media/rdma/rdma_mgr.h>
 #endif
 
 /* Local Headers */
@@ -331,6 +331,7 @@ struct vdin_dev_s {
 	 */
 	unsigned int afbce_flag;
 	unsigned int afbce_mode;
+	unsigned int afbce_lossy_en;
 	unsigned int canvas_config_mode;
 	bool	prehsc_en;
 	bool	vshrk_en;
@@ -406,5 +407,7 @@ extern bool is_dolby_vision_enable(void);
 extern void vdin_debugfs_init(struct vdin_dev_s *vdevp);
 extern void vdin_debugfs_exit(struct vdin_dev_s *vdevp);
 
+extern bool vlock_get_phlock_flag(void);
+
 #endif /* __TVIN_VDIN_DRV_H */
 

drivers/amlogic/media/vin/tvin/vdin/vdin_vf.c

@@ -1018,7 +1018,10 @@ void vdin_vf_disp_mode_update(struct vf_entry *vfe, struct vf_pool *p)
 		p->disp_index[0] = 0;
 	vfe->vf.index_disp = p->disp_index[0];
 
-	p->disp_mode[p->disp_index[p->skip_vf_num]] = VFRAME_DISP_MODE_OK;
+	if (p->disp_mode[p->disp_index[p->skip_vf_num]] !=
+		VFRAME_DISP_MODE_SKIP)
+		p->disp_mode[p->disp_index[p->skip_vf_num]] =
+			VFRAME_DISP_MODE_OK;
 	for (i = p->skip_vf_num - 1; i < VFRAME_DISP_MAX_NUM; i--)
 		p->disp_mode[p->disp_index[i]] = VFRAME_DISP_MODE_UNKNOWN;
 }
@@ -1030,8 +1033,7 @@ void vdin_vf_disp_mode_update(struct vf_entry *vfe, struct vf_pool *p)
 void vdin_vf_disp_mode_skip(struct vf_pool *p)
 {
 	unsigned int i;
-
-	for (i = p->skip_vf_num - 1; i < VFRAME_DISP_MAX_NUM; i--)
-		p->disp_mode[i] = VFRAME_DISP_MODE_SKIP;
+	for (i = 0; i <= p->skip_vf_num; i++)
+		p->disp_mode[p->disp_index[i]] = VFRAME_DISP_MODE_SKIP;
 }
 

include/linux/amlogic/media/frame_provider/tvin/tvin.h

@@ -64,11 +64,13 @@ enum tvin_port_e {
 	TVIN_PORT_VIU1_WB0_VD2,
 	TVIN_PORT_VIU1_WB0_OSD1,
 	TVIN_PORT_VIU1_WB0_OSD2,
+	TVIN_PORT_VIU1_WB0_VPP,
 	TVIN_PORT_VIU1_WB0_POST_BLEND,
 	TVIN_PORT_VIU1_WB1_VD1,
 	TVIN_PORT_VIU1_WB1_VD2,
 	TVIN_PORT_VIU1_WB1_OSD1,
 	TVIN_PORT_VIU1_WB1_OSD2,
+	TVIN_PORT_VIU1_WB1_VPP,
 	TVIN_PORT_VIU1_WB1_POST_BLEND,
 	TVIN_PORT_VIU2 = 0x0000C000,
 	TVIN_PORT_VIU2_VIDEO,
@@ -76,11 +78,13 @@ enum tvin_port_e {
 	TVIN_PORT_VIU2_WB0_VD2,
 	TVIN_PORT_VIU2_WB0_OSD1,
 	TVIN_PORT_VIU2_WB0_OSD2,
+	TVIN_PORT_VIU2_WB0_VPP,
 	TVIN_PORT_VIU2_WB0_POST_BLEND,
 	TVIN_PORT_VIU2_WB1_VD1,
 	TVIN_PORT_VIU2_WB1_VD2,
 	TVIN_PORT_VIU2_WB1_OSD1,
 	TVIN_PORT_VIU2_WB1_OSD2,
+	TVIN_PORT_VIU2_WB1_VPP,
 	TVIN_PORT_VIU2_WB1_POST_BLEND,
 	TVIN_PORT_MIPI = 0x00010000,
 	TVIN_PORT_ISP = 0x00020000,
@@ -461,18 +465,12 @@ struct tvafe_pin_mux_s {
 #define TVIN_IOC_G_VDIN_HIST       _IOW(_TM_T, 0x24, struct vdin_hist_s)
 #define TVIN_IOC_S_VDIN_V4L2START  _IOW(_TM_T, 0x25, struct vdin_v4l2_param_s)
 #define TVIN_IOC_S_VDIN_V4L2STOP   _IO(_TM_T, 0x26)
+#define TVIN_IOC_S_AFE_SONWCFG     _IOW(_TM_T, 0x27, unsigned int)
 
 /*
  *function defined applied for other driver
  */
 
-/*
- *adc pll ctl, atv demod & tvafe use the same adc module
- * module index: atv demod:0x01; tvafe:0x2
- */
-
-/* extern void adc_set_pll_cntl(bool on, unsigned int module_sel);*/
-
 struct dfe_adcpll_para {
 	unsigned int adcpllctl;
 	unsigned int demodctl;
@@ -501,8 +499,24 @@ struct rx_audio_stat_s {
 	int aud_type;
 	/* indicate if audio fifo start threshold is crossed */
 	bool afifo_thres_pass;
+	/*
+	 * 0 [ch1 ch2]
+	 * 1,2,3 [ch1 ch2 ch3 ch4]
+	 * 4,8 [ch1 ch2 ch5 ch6]
+	 * 5,6,7,9,10,11 [ch1 ch2 ch3 ch4 ch5 ch6]
+	 * 12,16,24,28 [ch1 ch2 ch5 ch6 ch7 ch8]
+	 * 20 [ch1 ch2 ch7 ch8]
+	 * 21,22,23[ch1 ch2 ch3 ch4 ch7 ch8]
+	 * all others [all of 8ch]
+	 */
+	int aud_alloc;
 };
 
+extern void adc_pll_down(void);
+/*ADC_EN_ATV_DEMOD	0x1*/
+/*ADC_EN_TVAFE		0x2*/
+/*ADC_EN_DTV_DEMOD	0x4*/
+/*ADC_EN_DTV_DEMODPLL	0x8*/
 extern int adc_set_pll_cntl(bool on, unsigned int module_sel, void *pDtvPara);
 extern void tvafe_set_ddemod_default(void);/* add for dtv demod*/
 extern void rx_get_audio_status(struct rx_audio_stat_s *aud_sts);