From 89f4f91e153b66cfe9ac0d049b463a803d64ea8c Mon Sep 17 00:00:00 2001 From: Ruixuan Li Date: Tue, 23 Apr 2019 16:07:12 +0800 Subject: [PATCH] emmc: run hs400 200M on sm1 [1/1] PD#SWPL-5404 Problem: run hs400 200M on sm1 Solution: config sm1 and modify dts Verify: passed on ac200 Change-Id: I34e54f88db79ce42f9effbf8d673ade613de328f Signed-off-by: Ruixuan Li --- arch/arm/boot/dts/amlogic/mesonsm1.dtsi | 5 ++++- arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts | 3 +-- arch/arm64/boot/dts/amlogic/mesonsm1.dtsi | 5 ++++- arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts | 3 +-- drivers/amlogic/mmc/aml_sd_emmc.c | 2 +- drivers/amlogic/mmc/aml_sd_emmc_v3.c | 7 ++++--- 6 files changed, 15 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/amlogic/mesonsm1.dtsi b/arch/arm/boot/dts/amlogic/mesonsm1.dtsi index c42cdb5f69bd..f06caec151fe 100644 --- a/arch/arm/boot/dts/amlogic/mesonsm1.dtsi +++ b/arch/arm/boot/dts/amlogic/mesonsm1.dtsi @@ -1362,7 +1362,7 @@ clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_SD_EMMC_C_P0_COMP>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_FCLK_DIV5>, + <&clkc CLKID_FCLK_DIV2P5>, <&xtal>; clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal"; @@ -1820,6 +1820,7 @@ function = "emmc"; input-enable; bias-pull-up; + drive-strength = <3>; }; }; @@ -1838,6 +1839,7 @@ function = "emmc"; input-enable; bias-pull-up; + drive-strength = <3>; }; }; @@ -1847,6 +1849,7 @@ function = "emmc"; input-enable; bias-pull-down; + drive-strength = <3>; }; }; diff --git a/arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts b/arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts index d920bf76f8db..a0b811580551 100644 --- a/arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts +++ b/arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts @@ -1488,8 +1488,7 @@ "MMC_CAP_HW_RESET", "MMC_CAP_ERASE", "MMC_CAP_CMD23"; - caps2 = "MMC_CAP2_HS200"; - /* "MMC_CAP2_HS400";*/ + caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400"; f_min = <400000>; f_max = <200000000>; }; diff --git a/arch/arm64/boot/dts/amlogic/mesonsm1.dtsi b/arch/arm64/boot/dts/amlogic/mesonsm1.dtsi index f00045eb1f7e..6b5f09734bd0 100644 --- a/arch/arm64/boot/dts/amlogic/mesonsm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesonsm1.dtsi @@ -1361,7 +1361,7 @@ clocks = <&clkc CLKID_SD_EMMC_C>, <&clkc CLKID_SD_EMMC_C_P0_COMP>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_FCLK_DIV5>, + <&clkc CLKID_FCLK_DIV2P5>, <&xtal>; clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal"; @@ -1819,6 +1819,7 @@ function = "emmc"; input-enable; bias-pull-up; + drive-strength = <3>; }; }; @@ -1837,6 +1838,7 @@ function = "emmc"; input-enable; bias-pull-up; + drive-strength = <3>; }; }; @@ -1846,6 +1848,7 @@ function = "emmc"; input-enable; bias-pull-down; + drive-strength = <3>; }; }; diff --git a/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts b/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts index 7803937f68fd..7036a41e7e20 100644 --- a/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts +++ b/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts @@ -1475,8 +1475,7 @@ "MMC_CAP_HW_RESET", "MMC_CAP_ERASE", "MMC_CAP_CMD23"; - caps2 = "MMC_CAP2_HS200"; - /* "MMC_CAP2_HS400";*/ + caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400"; f_min = <400000>; f_max = <200000000>; }; diff --git a/drivers/amlogic/mmc/aml_sd_emmc.c b/drivers/amlogic/mmc/aml_sd_emmc.c index b9f192ca783f..80add277eae6 100644 --- a/drivers/amlogic/mmc/aml_sd_emmc.c +++ b/drivers/amlogic/mmc/aml_sd_emmc.c @@ -3643,7 +3643,7 @@ static struct meson_mmc_data mmc_data_sm1 = { .sdmmc.ddr.tx_phase = 0, .sdmmc.hs2.core_phase = 2, .sdmmc.hs2.tx_phase = 0, - .sdmmc.hs4.tx_delay = 0, + .sdmmc.hs4.tx_delay = 16, .sdmmc.sd_hs.core_phase = 3, .sdmmc.sdr104.core_phase = 2, .sdmmc.sdr104.tx_phase = 0, diff --git a/drivers/amlogic/mmc/aml_sd_emmc_v3.c b/drivers/amlogic/mmc/aml_sd_emmc_v3.c index 9e84e6d7fd0f..de9982cc8f6a 100644 --- a/drivers/amlogic/mmc/aml_sd_emmc_v3.c +++ b/drivers/amlogic/mmc/aml_sd_emmc_v3.c @@ -350,7 +350,7 @@ static void aml_sd_emmc_set_timing_v3(struct amlsd_platform *pdata, if (pdata->tx_delay != 0) clkc->tx_delay = pdata->tx_delay; - if (((host->data->chip_type == MMC_CHIP_TL1) + if (((host->data->chip_type >= MMC_CHIP_TL1) || (host->data->chip_type == MMC_CHIP_G12B)) && aml_card_type_mmc(pdata)) { clkc->core_phase = para->hs4.core_phase; @@ -1877,7 +1877,7 @@ int aml_mmc_execute_tuning_v3(struct mmc_host *mmc, u32 opcode) intf3 |= (1<<22); writel(intf3, (host->base + SD_EMMC_INTF3)); pdata->intf3 = intf3; - if ((host->data->chip_type == MMC_CHIP_TL1) + if ((host->data->chip_type >= MMC_CHIP_TL1) || (host->data->chip_type == MMC_CHIP_G12B)) aml_emmc_hs200_tl1(mmc); err = 0; @@ -1895,7 +1895,8 @@ int aml_post_hs400_timming(struct mmc_host *mmc) struct amlsd_platform *pdata = mmc_priv(mmc); struct amlsd_host *host = pdata->host; aml_sd_emmc_clktest(mmc); - if (host->data->chip_type == MMC_CHIP_TL1) + if ((host->data->chip_type == MMC_CHIP_TL1) + || (host->data->chip_type == MMC_CHIP_SM1)) aml_emmc_hs400_tl1(mmc); else if (host->data->chip_type == MMC_CHIP_G12B) aml_emmc_hs400_Revb(mmc);