From 8a169769bb2d16a2be914cb814ec9188ac26a0cb Mon Sep 17 00:00:00 2001
From: YouMin Chen <cym@rock-chips.com>
Date: Thu, 10 Jun 2021 20:11:25 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3568: modify dmc clk

ddr clk using SCMI, replace <&cru SCLK_DDRCLK> with <&scmi_clk 3>

Change-Id: Ibce1779718c6800d3ce3e334ce0ed5151b9a6eec
Signed-off-by: YouMin Chen <cym@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 9ac8986584b9..92aa36c1c9b3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -2128,7 +2128,7 @@
 		interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "complete";
 		devfreq-events = <&dfi>;
-		clocks = <&cru SCLK_DDRCLK>;
+		clocks = <&scmi_clk 3>;
 		clock-names = "dmc_clk";
 		operating-points-v2 = <&dmc_opp_table>;
 		ddr_timing = <&ddr_timing>;