From 8aeb120bce0abf75e19fbe1b4edf1462daefab96 Mon Sep 17 00:00:00 2001 From: shengfei Xu Date: Tue, 8 Jun 2021 10:01:20 +0800 Subject: [PATCH] arm64: dts: rockchip: config the pmic_sleep internal pull up/down for rk356x boards Signed-off-by: shengfei Xu Change-Id: I7340b4e144c3de0f3cedcf1f4d0e7e12c6480955 --- arch/arm64/boot/dts/rockchip/rk3566-rk817-eink.dts | 4 ++-- arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-k108.dts | 4 ++-- arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-rkg11.dts | 4 ++-- arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-v10.dts | 4 ++-- arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet.dts | 4 ++-- arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi | 4 ++-- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-rk817-eink.dts b/arch/arm64/boot/dts/rockchip/rk3566-rk817-eink.dts index 060dc4e40174..b0216ae1583e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-rk817-eink.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-rk817-eink.dts @@ -783,12 +783,12 @@ soc_slppin_gpio: soc_slppin_gpio { rockchip,pins = - <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; + <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; }; soc_slppin_slp: soc_slppin_slp { rockchip,pins = - <0 RK_PA2 1 &pcfg_pull_none>; + <0 RK_PA2 1 &pcfg_pull_up>; }; soc_slppin_rst: soc_slppin_rst { diff --git a/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-k108.dts b/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-k108.dts index 6354ccfba93b..cb1ae9d2546c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-k108.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-k108.dts @@ -1067,12 +1067,12 @@ soc_slppin_gpio: soc_slppin_gpio { rockchip,pins = - <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; + <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; }; soc_slppin_slp: soc_slppin_slp { rockchip,pins = - <0 RK_PA2 1 &pcfg_pull_none>; + <0 RK_PA2 1 &pcfg_pull_up>; }; soc_slppin_rst: soc_slppin_rst { diff --git a/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-rkg11.dts b/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-rkg11.dts index 85b39ecf9c79..d10c0bb3989b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-rkg11.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-rkg11.dts @@ -977,12 +977,12 @@ soc_slppin_gpio: soc_slppin_gpio { rockchip,pins = - <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; + <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; }; soc_slppin_slp: soc_slppin_slp { rockchip,pins = - <0 RK_PA2 1 &pcfg_pull_none>; + <0 RK_PA2 1 &pcfg_pull_up>; }; soc_slppin_rst: soc_slppin_rst { diff --git a/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-v10.dts b/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-v10.dts index fecea6b9173b..ca412b19378c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet-v10.dts @@ -997,12 +997,12 @@ soc_slppin_gpio: soc_slppin_gpio { rockchip,pins = - <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; + <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; }; soc_slppin_slp: soc_slppin_slp { rockchip,pins = - <0 RK_PA2 1 &pcfg_pull_none>; + <0 RK_PA2 1 &pcfg_pull_up>; }; soc_slppin_rst: soc_slppin_rst { diff --git a/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet.dts b/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet.dts index af52a084ac7d..ebb0feecbe02 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-rk817-tablet.dts @@ -999,12 +999,12 @@ soc_slppin_gpio: soc_slppin_gpio { rockchip,pins = - <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; + <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; }; soc_slppin_slp: soc_slppin_slp { rockchip,pins = - <0 RK_PA2 1 &pcfg_pull_none>; + <0 RK_PA2 1 &pcfg_pull_up>; }; soc_slppin_rst: soc_slppin_rst { diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi index 5dd51ee7e7aa..cbb3189cc19d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi @@ -1449,12 +1449,12 @@ soc_slppin_gpio: soc_slppin_gpio { rockchip,pins = - <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; + <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; }; soc_slppin_slp: soc_slppin_slp { rockchip,pins = - <0 RK_PA2 1 &pcfg_pull_none>; + <0 RK_PA2 1 &pcfg_pull_up>; }; soc_slppin_rst: soc_slppin_rst {