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https://github.com/hardkernel/linux.git
synced 2026-06-09 12:17:12 +09:00
rk2928:a720:support i2c commucintion in sram and reduce arm and logic voltage when in sleep
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@@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_FREQ) += cpufreq.o
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obj-$(CONFIG_DVFS) += dvfs.o
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obj-$(CONFIG_PM) += pm.o
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CFLAGS_pm.o += -Os -mthumb
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obj-$(CONFIG_RK30_I2C_INSRAM) += i2c_sram.o
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obj-$(CONFIG_MACH_RK2928_FPGA) += board-rk2928-fpga.o
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obj-$(CONFIG_MACH_RK2928_SDK) += board-rk2928-sdk.o
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@@ -537,6 +537,54 @@ static struct i2c_board_info __initdata i2c0_info[] = {
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};
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#endif
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int __sramdata gpio0d4_iomux,gpio0d4_do,gpio0d4_dir;
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#define gpio_readl(offset) readl_relaxed(RK2928_GPIO0_BASE + offset)
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#define gpio_writel(v, offset) do { writel_relaxed(v, RK2928_GPIO0_BASE + offset); dsb(); } while (0)
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void __sramfunc rk30_pwm_logic_suspend_voltage(void)
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{
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#ifdef CONFIG_RK30_PWM_REGULATOR
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// int gpio0d7_iomux,gpio0d7_do,gpio0d7_dir,gpio0d7_en;
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sram_udelay(10000);
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gpio0d4_iomux = readl_relaxed(GRF_GPIO0D_IOMUX);
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gpio0d4_do = gpio_readl(GPIO_SWPORTA_DR);
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gpio0d4_dir = gpio_readl(GPIO_SWPORTA_DDR);
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writel_relaxed((gpio0d4_iomux |(1<<24)) & (~(1<<8)), GRF_GPIO0D_IOMUX);
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gpio_writel(gpio0d4_dir |(1<<28), GPIO_SWPORTA_DDR);
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gpio_writel(gpio0d4_do |(1<<28), GPIO_SWPORTA_DR);
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#endif
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}
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void __sramfunc rk30_pwm_logic_resume_voltage(void)
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{
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#ifdef CONFIG_RK30_PWM_REGULATOR
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writel_relaxed((1<<24)|gpio0d4_iomux, GRF_GPIO0D_IOMUX);
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gpio_writel(gpio0d4_dir, GPIO_SWPORTA_DDR);
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gpio_writel(gpio0d4_do, GPIO_SWPORTA_DR);
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sram_udelay(10000);
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#endif
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}
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extern void pwm_suspend_voltage(void);
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extern void pwm_resume_voltage(void);
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void rk30_pwm_suspend_voltage_set(void)
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{
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#ifdef CONFIG_RK30_PWM_REGULATOR
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pwm_suspend_voltage();
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#endif
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}
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void rk30_pwm_resume_voltage_set(void)
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{
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#ifdef CONFIG_RK30_PWM_REGULATOR
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pwm_resume_voltage();
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#endif
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}
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#ifdef CONFIG_I2C1_RK30
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static struct i2c_board_info __initdata i2c1_info[] = {
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#if defined (CONFIG_GS_MMA7660)
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2
arch/arm/mach-rk2928/include/mach/io.h
Normal file → Executable file
2
arch/arm/mach-rk2928/include/mach/io.h
Normal file → Executable file
@@ -124,6 +124,7 @@
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#define RK2928_I2C1_PHYS 0x20054000
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#define RK2928_I2C1_SIZE SZ_4K
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#define RK2928_RKI2C1_PHYS 0x20056000
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#define RK2928_RKI2C1_BASE RK2928_IO_TO_VIRT1(RK2928_RKI2C1_PHYS)
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#define RK2928_RKI2C1_SIZE SZ_4K
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#define RK2928_I2C2_PHYS 0x20058000
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#define RK2928_I2C2_SIZE SZ_4K
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@@ -149,6 +150,7 @@
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#define RK2928_I2C0_PHYS 0x20070000
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#define RK2928_I2C0_SIZE SZ_4K
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#define RK2928_RKI2C0_PHYS 0x20072000
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#define RK2928_RKI2C0_BASE RK2928_IO_TO_VIRT1(RK2928_RKI2C0_PHYS)
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#define RK2928_RKI2C0_SIZE SZ_4K
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#define RK2928_SPI_PHYS 0x20074000
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#define RK2928_SPI_SIZE SZ_16K
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2
arch/arm/mach-rk2928/io.c
Normal file → Executable file
2
arch/arm/mach-rk2928/io.c
Normal file → Executable file
@@ -48,6 +48,8 @@ static struct map_desc rk2928_io_desc[] __initdata = {
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RK2928_DEVICE(PWM),
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RK2928_DEVICE(DDR_PCTL),
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RK2928_DEVICE(DDR_PHY),
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RK2928_DEVICE(RKI2C0),
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RK2928_DEVICE(RKI2C1),
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{
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.virtual = (unsigned long) RK2928_IMEM_NONCACHED,
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.pfn = __phys_to_pfn(RK2928_IMEM_PHYS),
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7
arch/arm/mach-rk2928/pm.c
Normal file → Executable file
7
arch/arm/mach-rk2928/pm.c
Normal file → Executable file
@@ -240,7 +240,11 @@ static noinline void interface_ctr_reg_pread(void)
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readl_relaxed(RK2928_GPIO1_BASE);
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readl_relaxed(RK2928_GPIO2_BASE);
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readl_relaxed(RK2928_GPIO3_BASE);
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// readl_relaxed(RK2928_I2C1_BASE);
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#if defined (CONFIG_MACH_RK2928_SDK)
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readl_relaxed(RK2928_RKI2C1_BASE);
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#else
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readl_relaxed(RK2928_RKI2C0_BASE);
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#endif
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}
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__weak void board_gpio_suspend(void) {}
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@@ -397,6 +401,7 @@ static int rk2928_pm_enter(suspend_state_t state)
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| (1 << CLK_GATE_PCLK_GPIO2 % 16)
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| (1 << CLK_GATE_PCLK_GPIO3 % 16)
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, clkgt_regs[8], CRU_CLKGATES_CON(8), 0xffff);
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cru_writel( ((1 << CLK_GATE_PCLK_GPIO0 % 16)<<16), CRU_CLKGATES_CON(8));
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gate_save_soc_clk(0
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| (1 << CLK_GATE_CLK_L2C % 16)
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| (1 << CLK_GATE_HCLK_PERI_ARBI % 16)
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