diff --git a/drivers/amlogic/media/deinterlace/deinterlace.c b/drivers/amlogic/media/deinterlace/deinterlace.c
index 0aeacb87128d..064c4943894a 100644
--- a/drivers/amlogic/media/deinterlace/deinterlace.c
+++ b/drivers/amlogic/media/deinterlace/deinterlace.c
@@ -129,7 +129,7 @@ static di_dev_t *de_devp;
 static dev_t di_devno;
 static struct class *di_clsp;
 
-static const char version_s[] = "2019-03-19";
+static const char version_s[] = "2019-03-20a";
 
 static int bypass_state = 1;
 static int bypass_all;
@@ -6011,6 +6011,7 @@ static void di_unreg_process_irq(void)
 	adpative_combing_exit();
 	enable_di_pre_mif(false, mcpre_en);
 	/*disable afbc module when afbc working in DI*/
+	afbc_reg_unreg_flag = 0;
 	#if 0
 	if (IS_COMP_MODE(di_pre_stru.cur_inp_type) &&
 		(!needbypass_flag && !isbypass_flag)) {
diff --git a/drivers/amlogic/media/deinterlace/deinterlace_hw.c b/drivers/amlogic/media/deinterlace/deinterlace_hw.c
index c40500eaa055..cb3145976632 100644
--- a/drivers/amlogic/media/deinterlace/deinterlace_hw.c
+++ b/drivers/amlogic/media/deinterlace/deinterlace_hw.c
@@ -1272,7 +1272,7 @@ static void afbc_power_sw(bool on)
 		/*afbcx_power_sw(dec_sel, on);*/
 }
 
-static int afbc_reg_unreg_flag;
+int afbc_reg_unreg_flag;
 void afbc_sw(bool on)
 {
 	if (is_meson_gxl_cpu() || is_meson_txlx_cpu())
@@ -3650,7 +3650,7 @@ static void di_pre_data_mif_ctrl(bool enable)
 			afbc_input_sw(true);
 		} else {
 			DI_Wr(DI_INP_GEN_REG, Rd(DI_INP_GEN_REG) | 0x1);
-			afbc_input_sw(false);
+			/*afbc_input_sw(false);*/
 		}
 		#endif
 		/* nrwr no clk gate en=0 */
diff --git a/drivers/amlogic/media/deinterlace/deinterlace_hw.h b/drivers/amlogic/media/deinterlace/deinterlace_hw.h
index 28ec32c4c41a..d85c8b3202ab 100644
--- a/drivers/amlogic/media/deinterlace/deinterlace_hw.h
+++ b/drivers/amlogic/media/deinterlace/deinterlace_hw.h
@@ -212,6 +212,7 @@ extern void afbc_reg_sw(bool on);
 extern void afbc_sw(bool on);
 extern void afbc_input_sw(bool on);
 extern void dump_vd2_afbc(void);
+extern int afbc_reg_unreg_flag;
 
 extern u8 *di_vmap(ulong addr, u32 size, bool *bflg);
 extern void di_unmap_phyaddr(u8 *vaddr);