From 8d315643b0559a2abbbc5639f50f85a52b4ba2cb Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Mon, 25 Nov 2024 11:12:41 +0800
Subject: [PATCH] arm64: dts: rockchip: rv1126b: add crypto & rng node

Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
Change-Id: Ifa9144d9280df74e0c6d1aee14eeac4eb7453901
---
 arch/arm64/boot/dts/rockchip/rv1126b.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
index e4fbb3862e82..023b9e376e2e 100644
--- a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
@@ -289,6 +289,27 @@
 		};
 	};
 
+	crypto: crypto@20940000 {
+		compatible = "rockchip,crypto-ce";
+		reg = <0x20940000 0x2000>;
+		interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_NSRKCE>, <&cru HCLK_NS_RKCE>,
+			 <&cru CLK_PKA_NSRKCE>;
+		clock-names = "aclk", "hclk", "pka";
+		resets = <&cru SRST_HRESETN_NS_RKCE>;
+		reset-names = "crypto-rst";
+		status = "disabled";
+	};
+
+	rng: rng@20950000 {
+		compatible = "rockchip,rkrng";
+		reg = <0x20950000 0x200>;
+		interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+		resets = <&cru SRST_HRESETN_RKRNG_NS>;
+		reset-names = "reset";
+		status = "disabled";
+	};
+
 	sai0: sai@20960000 {
 		compatible = "rockchip,rv1126b-sai", "rockchip,sai-v1";
 		reg = <0x20960000 0x1000>;